Semiconductor process using selective deposition

Details Semiconductor process using selective deposition Semiconductor process using selective deposition

1989-10-30

1991-04-23

Hear, Brian E.

Fishing, trapping, and vermin destroying

437 28, 437 34, 437 40, 437 58, 437913, 148DIG9, 148DIG82, 148DIG105, H01L 21265

Patent

active

050100300

ABSTRACT:
A process for fabricating semiconductor devices is disclosed which utilizes a selective deposition process to reduce the total number of process steps and especially the total number of photolithography steps required. In accordance with one embodiment of the invention a semiconductor substrate is provided having an insulating layer, a nucleating layer, and a second insulating layer overlaying the substrate. A photoresist mask is used an implant mask and as an etch mask to expose a portion of nucleating layer. A second implant mask is formed by the selective deposition of tungsten or other material on the exposed nucleating layer. The selectively deposited material is then used a mask for a second implantation.

REFERENCES:
patent: 4528744 (1985-07-01), Shibata
patent: 4717683 (1988-01-01), Parrillo et al.
patent: 4843023 (1989-06-01), Chiu et al.
patent: 4847213 (1989-07-01), Pfiester
patent: 4891326 (1990-01-01), Koyanagi

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