Semiconductor process for forming channel layer with passivated

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437 40, 437101, 437909, 437968, H01L 2184

Patent

active

054551820

ABSTRACT:
A thin film transistor which includes a first insulating layer, a silicon channel layer formed on the first insulating layer, and a second insulating layer formed on the silicon channel layer, and a passivation layer formed on the first insulating layer and formed successive to and covering the side face of the channel layer between the first and second insulating layers.

REFERENCES:
patent: 4814292 (1989-03-01), Sasaki et al.
patent: 5047819 (1991-09-01), Tanaka et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor process for forming channel layer with passivated does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor process for forming channel layer with passivated , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor process for forming channel layer with passivated will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1077024

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.