Semiconductor pressure sensor and its manufacturing method

Measuring and testing – Fluid pressure gauge – Electrical

Reexamination Certificate

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Details

C073S862000, C257S417000, C257S419000

Reexamination Certificate

active

06619133

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor pressure sensor for measuring a pressure by utilizing the piezoresistive effect of a semiconductor, and a method of manufacturing the same.
BACKGROUND ART
Among various types of pressure sensors, a semiconductor pressure sensor which utilizes the piezoresistive effect of a semiconductor is compact, lightweight, and highly sensitive, and is accordingly widely used in applications such as industrial instrumentation field and medical field. In such a semiconductor pressure sensor, a strain gauge with a piezoresistive effect is formed on a semiconductor diaphragm. The strain gauge is deformed by a pressure applied to the diaphragm, and a change in resistance of the strain gauge caused by the piezoresistive effect is detected, thereby measuring the pressure. The diaphragm is formed by engraving one surface of a semiconductor wafer by etching. The thickness of the diaphragm largely influences the characteristics of the semiconductor pressure sensor. Accordingly, the thickness of the diaphragm must be controlled precisely. In a conventional manufacturing method, however, the etching time and temperature are difficult to control, making it very difficult to control the thickness of the diaphragm and its uniformity at high precision.
A semiconductor pressure sensor has been proposed in which an etching stopper layer made of an insulator or the like is formed in a semiconductor substrate, and the semiconductor substrate is etched to the etching stopper layer, thereby precisely controlling the thickness of the diaphragm (Japanese Patent Publication No. 59-38744).
FIG. 4
is a sectional view of the conventional semiconductor pressure sensor disclosed in Japanese Patent Publication No. 59-38744. This semiconductor pressure sensor is comprised of a single-crystal Si layer
11
serving as a base, an SiO
2
layer
12
formed on the single-crystal Si layer
11
, a single-crystal Si layer
13
formed on the SiO
2
layer
12
, a diaphragm
14
formed by etching that portion of the single-crystal Si layer
11
which corresponds to the pressure-sensitive region by using the SiO
2
layer
12
as an etching stopper layer, and a strain gauge (not shown) with a piezoresistive effect formed on the surface of the single-crystal Si layer
13
.
In the semiconductor pressure sensor shown in
FIG. 4
, the diaphragm
14
undesirably has temperature characteristics due to a difference in coefficient of thermal expansion between the Si layer
13
and SiO
2
layer
12
. Also, at a diaphragm edge portion
16
, cracking occurs in the SiO
2
layer
12
more fragile than Si due to deflection of the diaphragm
14
. This cracking extends to the Si layer
13
to finally break the diaphragm
14
. Even if the exposed SiO
2
layer
12
is removed after etching the Si layer
11
, since the SiO
2
layer
12
remains in the diaphragm edge portion
16
, cracking still occurs in an interface between the Si layer
13
and SiO
2
layer
12
.
The present invention has been made in order to solve these problems, and has as its object to provide a semiconductor pressure sensor in which the temperature characteristics of a diaphragm can be improved and the strength of a diaphragm edge portion can be increased, and a method of manufacturing the same.
DISCLOSURE OF INVENTION
In order to achieve the above object, the present invention comprises a first semiconductor layer forming a base, an insulating layer formed on the first semiconductor layer, a second semiconductor layer formed on the insulating layer and having a diaphragm portion constituting a pressure-sensitive region, and a recess formed in the pressure-sensitive region to extend through the first semiconductor layer and the insulating layer to have a predetermined depth reaching the second semiconductor layer. Hence, the insulating layer does not remain on the diaphragm portion and a diaphragm edge portion.
The present invention also comprises the steps of forming a three-layered structure consisting of a first semiconductor layer forming a base, an insulating layer formed on the first semiconductor layer, and a second semiconductor layer formed on the insulating layer and having a pressure-sensitive region, etching the first semiconductor layer corresponding to the pressure-sensitive region by using the insulating layer as an etching stopper layer, thereby exposing the insulating layer, removing the exposed insulating layer, and etching the second semiconductor layer by a predetermined amount by using the remaining insulating layer as a mask, thereby forming a diaphragm portion at the pressure-sensitive region.
In the present invention, the depth of the recess formed in the second semiconductor layer has an upper allowable limit of ten-odd &mgr;m.
According to one arrangement of the present invention, the second semiconductor layer has a thickness of 30 &mgr;m and the recess formed in the second semiconductor layer has a depth of 5 &mgr;m to 10 &mgr;m.
According to one arrangement of the present invention, the first and second semiconductor layers are made of n-type single-crystal Si and the insulating layer is made of SiO
2.
One arrangement of the present invention comprises at least one strain gauge formed on the diaphragm portion of the second semiconductor layer.


REFERENCES:
patent: 5145810 (1992-09-01), Matsumi
patent: 5296730 (1994-03-01), Takano et al.
patent: 5552347 (1996-09-01), Takano et al.
patent: 5770883 (1998-06-01), Mizuno et al.
patent: 6284670 (2001-09-01), Abe et al.
patent: 0512771 (1992-11-01), None
patent: 59-038744 (1984-09-01), None
patent: 2-281760 (1990-11-01), None
patent: 3-248474 (1991-11-01), None
patent: 8-116069 (1996-05-01), None

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