Amplifiers – With semiconductor amplifying device – Including plural amplifier channels
Reexamination Certificate
2001-03-27
2004-07-27
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural amplifier channels
C330S302000
Reexamination Certificate
active
06768381
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority right under 35 U.S.C. 119 of Japanese Patent Application No. 86157/2000 filed in Japan on Mar. 27, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor power amplifier and a multistage monolithic integrated circuit which are constituted by connecting a plurality of transistors in parallel to one another and which can obtain a high output current.
2. Related Background Art
A high output transistor having a large output current is constituted by connecting a plurality of transistor units in parallel to one another in an equivalent manner as shown in FIG.
1
. When the high output transistor shown in
FIG. 1
is formed on a semiconductor substrate, an element size is enlarged. Therefore, a spread of a transverse direction of an input/output wiring region acts as transmission lines Li, Lo in an equivalent manner.
In a high frequency region in which the transmission lines Li, Lo influence electric characteristics, signal propagation of an odd mode occurs by an unbalance between the transistors, and loop oscillation (including a f/2 spurious oscillation) is caused (reference document: MW89-59, page 59 by Research Center of Japanese Society of Electronic Communication).
For example, in a circuit of
FIG. 1
, loop oscillation occurs in loops shown by dotted lines A and B.
As a technique for preventing such a loop oscillation, as shown in
FIGS. 2 and 3
, a technique has been proposed in which a balance resistance Rb is connected between output terminals of two transistors adjacent to each other among transistors Q
1
to Q
4
, loss is applied to a loop oscillation path and the loop oscillation is prevented. Since the balance resistance Rb is connected between the output terminals, a signal loss of the loop oscillation path increases, and the loop oscillation can be inhibited.
However, when the balance resistance Rb is added, an area occupied by an input signal synthesis circuit and output signal synthesis circuit is enlarged by the resistance. Therefore, it becomes difficult to form the circuit on a semiconductor chip. The circuit may also be formed on a ceramic substrate or a glass epoxy substrate. In order to reduce a size of an element, however, a high output amplifier is preferably formed on the semiconductor chip to constitute a microwave monolithic integrated circuit (MMIC).
When the loop oscillation is inhibited by a conventional technique in this manner, it is difficult to reduce the size of the element, and cost cannot be lowered.
SUMMARY OF THE INVENTION
The present invention has been developed in consideration of this respect, and an object thereof is to provide a semiconductor power amplifier and a multistage monolithic integrated circuit which can be reduced in size and cost, and loop oscillation can sufficiently be inhibited.
To achieve the aforementioned object, there is provided a semiconductor power amplifier for amplifying a high frequency signal inputted to a signal input terminal by first and second transistors connected in parallel to each other to output the amplified signal via a signal output terminal, the semiconductor power amplifier comprising:
a first capacitor element connected between the signal input terminal and an input terminal of the first transistor;
a second capacitor element connected between the signal input terminal and an input terminal of the second transistor; and
a first impedance element connected between the respective input terminals of the first and second transistors.
According to the present invention, since capacitor elements are connected to the respective input terminals of the first and second transistors, and a resistance element is connected between the respective input terminals of the first and second transistors, loop oscillation (including an f/2 spurious oscillation) by signal propagation of an odd mode of a high output transistor can be prevented.
Moreover, since a bias circuit is separately disposed, a direct current bias can be supplied to the first and second transistors. Even when the capacitor elements are connected to the respective input terminals of the first and second transistors, no particular trouble occurs in an operation.
Furthermore, the present invention is particularly effective for a microwave monolithic integrated circuit using an MOS transistor and a bipolar transistor by a compound semiconductor for use in a high frequency band.
Moreover, there is provided a semiconductor power amplifier for amplifying a signal inputted to a signal input terminal by first and second transistors connected in parallel to each other to output the amplified signal via a signal output terminal, the semiconductor power amplifier comprising:
a first inductor element and a first capacitor element connected in series between the signal input terminal and an input terminal of the first transistor;
a second inductor element and a second capacitor element connected in series between the signal input terminal and an input terminal of the second transistor;
a first impedance element connected between the respective input terminals of the first and second transistors;
a third inductor element connected between an output terminal of the first transistor and the signal output terminal; and
a fourth inductor element connected between an output terminal of the second transistor and the signal output terminal.
REFERENCES:
patent: 3769586 (1973-10-01), Shapiro et al.
patent: 5608353 (1997-03-01), Pratt
patent: 5694085 (1997-12-01), Walker
patent: 5949287 (1999-09-01), Kurusu et al.
patent: 6005442 (1999-12-01), Maeda et al.
patent: 6201445 (2001-03-01), Morimoto et al.
patent: 10-163772 (1998-06-01), None
patent: 11-251849 (1999-09-01), None
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