Semiconductor package with traces routed underneath a die

Details Semiconductor package with traces routed underneath a die Semiconductor package with traces routed underneath a die

1999-10-27

2000-10-24

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257698, 257700, 257774, 257784, 257692, 361794, 361777, 361780, H01L 2352

Patent

active

061371688

ABSTRACT:
A semiconductor device package is presented for housing an integrated circuit which includes bonding fingers located within a conductive ring structure and routed to device terminals on an underside surface of the semiconductor device package. The semiconductor device package includes a die area defined upon a planar upper surface, a conductive ring surrounding the die area, and a first set of bonding fingers arranged within the conductive ring. The die area is dimensioned to receive the integrated circuit. The conductive ring may be a power ring or a ground ring. The conductive ring and the first set of bonding fingers are located within a first signal layer adjacent to the upper surface. A set of bonding pads which serve as device terminals reside within a second signal layer adjacent to a planar underside surface. The semiconductor device package also includes a first set of signal traces connected to bonding fingers within the first signal layer, a second set of signal traces connected to bonding pads within the second signal layer, and vias connecting members of the first and second sets of signal traces. The signal traces and vias form signal paths between members of the first set of bonding fingers and corresponding bonding pads which "loop back" upon themselves. The semiconductor device package also includes a combined power and ground plane configured to stabilize the impedances of the "loop back" signal paths.

REFERENCES:
patent: 5399903 (1995-03-01), Rostoker et al.
patent: 5640048 (1997-06-01), Selna

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