Semiconductor package with stacked chips and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Reexamination Certificate

active

10982559

ABSTRACT:
A semiconductor package with stacked chips and a method for fabricating the same are proposed. The semiconductor package includes a lead frame having a plurality of leads and supporting extensions; at least one preformed package having an active surface, and a non-active surface attached to the supporting extensions of the lead frame; at least one chip mounted on the active surface of the preformed package; a plurality of bonding wires for electrically interconnecting the lead frame, the preformed package and the chip; and an encapsulant for encapsulating the preformed package, the chip, the bonding wire and a portion of the lead frame. The active surface of the preformed package serves for carrying the chip and can be used as a wire jumper, so as to solve a known good die (KGD) problem of a multi-chip module.

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patent: 6603072 (2003-08-01), Foster et al.
patent: 6690089 (2004-02-01), Uchida
patent: 6812556 (2004-11-01), Uchida
patent: 2003/0038356 (2003-02-01), Derderian
patent: 2004/0018662 (2004-01-01), Goto
patent: 2005/0280133 (2005-12-01), Luo et al.

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