Semiconductor package with offset die pad

Details Semiconductor package with offset die pad Semiconductor package with offset die pad

1997-12-19

2000-08-29

Guay, John

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

257707, 257711, 257730, 257668, 257670, H01L 2313

Patent

active

061113158

ABSTRACT:
A semiconductor package includes a stiffener strip (10) having a die pad (18) and a body portion (12). A first surface (4) of the die pad (18) is offset from a second surface (3) of the body portion (12) a predetermined amount. The stiffener strip (10) includes an internal edge (27) concentrically disposed about the die pad (18) and tie straps (16) connecting the internal edge (27) to the die pad (18). A die (28) is affixed to the first surface (4) of the die pad (18). A substrate (20) has a first surface (17) and a second surface (19), with the second surface (19) being affixed to the first surface (2) of the body portion (12). The substrate (20) includes a window (22) and conductive elements (24). A plastic molding material (33) encompasses the die (28), at least a portion of the stiffener strip (10), and at least a portion of the substrate (20).

REFERENCES:
patent: 5196992 (1993-03-01), Sawaya
patent: 5391923 (1995-02-01), Harada
patent: 5656864 (1997-08-01), Mitsue et al.
patent: 5714799 (1998-02-01), Okumura
patent: 5717252 (1998-02-01), Nakashima et al.

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