Semiconductor package with metal pads

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

28, 28, 28

Reexamination Certificate

active

06437429

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor package with metal pads replacing of the outer leads, such as QFN, SON package structure, and especially to a semiconductor package with metal pads that there is an interval between a metal pad and corresponding cutting surface for avoiding the formation of a sharp edge.
BACKGROUND OF THE INVENTION
Conventional semiconductor device includes a die protected from injury of the hostile environment by using a package body to seal, and a lead frame (leads) for electrically connecting the die of the semiconductor package to a printed circuit board, such as Quad Flat Package, QFP with outer leads around the package body or Small Outline Package, SOP with outer leads at the both sides of the package body.
With small size of the semiconductor package, a semiconductor package with metal pads replacing of outer leads brought up from U.S. Pat. No. 6,143,981 “Plastic Integrated Circuit Package And Method And Lead frame For Making The Package” may decrease the surface footprint. FIG.
1
and
FIG. 3
are cross sectional view and side view of a semiconductor package
100
respectively. As shown in
FIG. 2
, a lead frame
170
is going to encapsulate the semiconductor package
100
. The lead frame
170
has a plurality of frames
171
, each frame
171
connects a die pad
130
and a plurality of leads
140
facing the die pad
130
. After sticking a die
110
on the die pad
130
, electrically connect the bonding pads of the die
110
to topside surfaces of the leads
140
with bonding wires. Then there is a package body
120
(or called encapsulant material) formed by molding, injection and baking to seal the die
110
, bonding wires
150
, and the topside surfaces
141
of the leads
140
, but to expose the downside surfaces
142
(metal pads) of the leads
140
in which use of outer electrical connection of the semiconductor package. After electroplating the downside surfaces
142
of leads
140
, a plurality of whole semiconductor packages
100
, such as Quad Flat Non-leaded package, QFN or Small Outline Non-leaded package, SON, may be gained through cutting the leads
140
along the package body
120
. However, as shown in
FIG. 3
, the cutting surfaces
143
of leads
140
on the lateral surface of package body
120
are adjacent to downside brim of package body
120
and connect with the downside surface
142
of the corresponding leads
140
(as shown in FIG.
1
). It is easy to form a sharp edge at the brim
144
of downside surface
142
of leads
140
so that it may affect the coplanarity of the downside surface
142
of leads
140
and results in a surface-mounting fail with a printed circuit board.
SUMMARY OF THE INVENTION
The first object of the present invention is to provide a semiconductor package with metal pads, each metal pad is formed by partial downside surface of the corresponding lead, a plurality of metal pads are formed on a same plane. In order to avoid forming the cutting sharp edge at the brim of metal pads during cutting leads to affect the surface mounting and simultaneously enhance the fixing stability of the leads to the package body, an interval is formed between the cutting surface of the lead and the plane of forming metal pads by means of gap-etching or bend-stamping.
The second object of the present invention is to provide a leadframe for non-leaded semiconductor package. By using that all the cutting portions of the leads are higher than the metal pads on the downside surface of lead, the downside surfaces of leads between metal pads and cutting portions can be covered by the package body, therefore the cutting sharp edges may be avoided forming at the brims of metal pads.
According to the present invention, a semiconductor package with metal pads mainly comprises a die, a plurality of leads, a plurality of electrical connecting devices and a package body. The die has a topside surface with a plurality of bonding pads and a downside surface opposite to the topside surface. Each lead has a topside surface, a downside surface and a cutting surface. The electrical connecting devices, such as bonding wires, are to electrically connect the bonding pads of the die to the topside surface of the corresponding lead. The package body seals the topside surface of the die, the electrical connecting devices and the topside surfaces of the leads, but exposes the partial downside surfaces of leads to form the metal pads. There is an interval between the cutting surfaces and a plane that the metal pads are formed on for avoiding forming a sharp edge at the brim of the metal pad.


REFERENCES:
patent: 6143981 (2000-11-01), Glenn
patent: 6198171 (2001-03-01), Huang et al.
patent: 6204554 (2001-03-01), Ewer et al.
patent: 6208023 (2001-03-01), Nakayama et al.
patent: 6211462 (2001-04-01), Carter et al.
patent: 6281568 (2001-08-01), Glenn et al.
patent: 6294830 (2001-09-01), Fjelstad

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor package with metal pads does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor package with metal pads, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package with metal pads will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2924283

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.