Semiconductor package with ground plane

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Details

357 71, 357 68, H01L 2348, H01L 2312, H01L 2354

Patent

active

049656546

ABSTRACT:
A plastic encapsulated semiconductor package in which the connecting lead frame members are deposited over the surface of the device together with a covering ground plane so as to provide enhanced electrical and thermal coupling of the members and the device and so reduce the signal to noise ratio by a factor or greater than three over that available in other similar plastic encapsulated packages while simultaneously improving the transfer of heat out of the package.
In particular, a lead frame having a plurality of conductors is attached to a major active surface of a semiconductor chip via a ground plane which, in the preferred embodiment, is a multilayered structure containing an insulated integral, uniform ground plane positioned between the lead frame and the chip and adhesively and insulatively joined to both of them. Wires connect terminals on the major active surface of the semiconductor chip to the ground plane and to selective lead frame conductors. The lead frame, the ground plane structure, the semiconductor chip, and the wires which connect the semiconductor chip terminals to the ground plane and to selected lead frame conductors are encapsulated with a suitable insulating material to form a semiconductor module or package.

REFERENCES:
patent: 4791473 (1988-12-01), Phy
patent: 4796078 (1989-01-01), Phepls, Jr. et al.
patent: 4833521 (1989-05-01), Early
patent: 4862245 (1989-08-01), Pashby et al.
patent: 4916519 (1990-04-01), Ward

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