Semiconductor package with exposed heat sink and the heat...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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Reexamination Certificate

active

11029529

ABSTRACT:
A semiconductor package with an exposed heat sink and the heat sink thereof are proposed. A carrier having a first surface and a second surface is provided. At least one chip is mounted on the first surface of the carrier and electrically connected to the carrier. A heat sink includes a flat portion having an exposed surface, and a support portion extended peripherally from the flat portion and attached to the first surface of the carrier, wherein the flat portion, the support portion and the carrier form a space where the chip is received, and the flat portion is peripherally formed with a stepped structure having at least one flash preventing groove located at a position adjacent to the exposed surface so as to prevent resin flashes on the exposed surface of the heat sink during a molding process for forming an encapsulant that encapsulates the chip.

REFERENCES:
patent: 6249433 (2001-06-01), Huang et al.
patent: 6552428 (2003-04-01), Huang et al.
patent: 2003/0128520 (2003-07-01), Yang
patent: 2004/0113263 (2004-06-01), Wu
patent: 2004/0164404 (2004-08-01), Huang
patent: 2005/0073036 (2005-04-01), Appelt et al.
patent: 2005/0104195 (2005-05-01), Yang

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