Semiconductor package utilizing a flexible wiring substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

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Details

257696, 257706, 257707, 257738, 257779, 257780, 257784, H01L 2302

Patent

active

061630705

ABSTRACT:
A semiconductor package having a plurality of electrodes arranged along one side of a rectangular semiconductor element; a plurality of wirings, one end of the wiring to be electrically connected with the electrode being arranged adjacent to the electrode and the other end of the wiring being exposed from an opening for external connection; a conductive member provided on the opening for external connection; a flexible wiring substrate on which the semiconductor element is mounted, and the wiring and the conductive member are arranged; and a sealing resin for sealing, except for the conductive member, the semiconductor element and a periphery of the semiconductor element. The semiconductor package can be connected in a horizontal or inclined condition with respect to the substrate for packaging by folding the flexible wiring substrate.

REFERENCES:
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patent: 5239447 (1993-08-01), Cotues et al.
patent: 5343075 (1994-08-01), Nishino
patent: 5373189 (1994-12-01), Massit et al.
patent: 5559316 (1996-09-01), Tomada
patent: 5598033 (1997-01-01), Behlen et al.
patent: 5635760 (1997-06-01), Ishikawa
patent: 5726492 (1998-03-01), Suzuki et al.
patent: 5903049 (1999-05-01), Mori
patent: 6011694 (2000-01-01), Hirakawa
IBM Technical Disclosure Bulletin, Improved Method for C-4 Chip join, vol. 31, No. 6, Nov., 1998, pp. 335 and 336.
IBM Technical Disclosure Bulletin, Stacked Tab Chip Carrier, vol. 33, No. 6A, Nov. 1990, pp. 352 and 353.
Productronic 1995, vol. 7, p. 8, No. 459.

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