Semiconductor package substrate

Details Semiconductor package substrate Semiconductor package substrate

2007-02-02

2010-06-08

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S700000, C257S737000, C257S783000, C257SE23062, C326S026000, C326S030000

Reexamination Certificate

active

07732913

ABSTRACT:
A semiconductor package substrate is provided, which includes a substrate body having a plurality of conductive through holes formed therein, wherein at least two adjacent conductive through holes are formed as a differential pair, each of which has a ball pad formed at an end thereof; and at least one electrically integrated layer formed in the substrate body, and having an opening corresponding to the two adjacent conductive through holes formed as the differential pair and the ball pads thereof. Thus, the spacing between the conductive through holes and the electrically integrated layer and the spacing between the ball pads can be enlarged by the opening, so as to balance the impedance match.

REFERENCES:
patent: 6001671 (1999-12-01), Fjelstad
patent: 2006/0017151 (2006-01-01), Yoon et al.

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