Semiconductor package structure reducing warpage and...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S738000, C257S780000, C438S613000

Reexamination Certificate

active

06936922

ABSTRACT:
An electrical substrate useful for semiconductor packages is disclosed. The electrical substrate includes a core insulative layer. A first surface of the insulative layer has circuit patterns thereon. Some of the circuit patterns are stepped in their heights from the first surface, in that a first subportion of the circuit pattern, including a ball land, extends further from the first surface than a second subportion of the same circuit pattern, and also extends further from the first surface than a ball land of other circuit patterns. Accordingly, solder balls fused to the ball lands of the stepped circuit patterns extend further from the first surface than same-size solder balls fused to the ball lands of the non-stepped circuit patterns, thereby circumventing electrical connectivity problems that may arise from warpage of the electrical substrate.

REFERENCES:
patent: 5474958 (1995-12-01), Djennas et al.
patent: 5602059 (1997-02-01), Horiuchi et al.
patent: 5620928 (1997-04-01), Lee et al.
patent: 5668405 (1997-09-01), Yamashita
patent: 5763939 (1998-06-01), Yamashita
patent: 5777387 (1998-07-01), Yamashita et al.
patent: 5786239 (1998-07-01), Ohsawa et al.
patent: 5885849 (1999-03-01), DiStefano et al.
patent: 5903052 (1999-05-01), Chen et al.
patent: 5909633 (1999-06-01), Haji et al.
patent: 6060778 (2000-05-01), Jeong et al.
patent: 6093970 (2000-07-01), Ohsawa et al.
patent: 6172419 (2001-01-01), Kinsman
patent: 6180881 (2001-01-01), Isaak
patent: 6198171 (2001-03-01), Huang et al.
patent: 6225146 (2001-05-01), Yamaguchi et al.
patent: 6242281 (2001-06-01), Mclellan et al.
patent: 6268568 (2001-07-01), Kim
patent: 6395578 (2002-05-01), Shin et al.
patent: 6399418 (2002-06-01), Glenn et al.
patent: 6448506 (2002-09-01), Glenn et al.
patent: 6452278 (2002-09-01), DiCaprio et al.
patent: 6486537 (2002-11-01), Liebhard
patent: 6501184 (2002-12-01), Shin et al.
patent: 6515356 (2003-02-01), Shin et al.
patent: 6541854 (2003-04-01), Huang et al.
patent: 6564454 (2003-05-01), Glenn et al.
patent: 6682998 (2004-01-01), Kinsman
patent: 6746894 (2004-06-01), Fee et al.
patent: 2002/0140065 (2002-10-01), Paek
patent: 2002/0180040 (2002-12-01), Camenforte et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor package structure reducing warpage and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor package structure reducing warpage and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package structure reducing warpage and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3460529

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.