Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-01-18
2004-01-13
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S777000, C257S723000, C257S724000, C257S699000, C257S712000, C257S713000, C257S730000, C257S731000, C257S727000, C257S678000, C257S726000, C257S775000, C257S773000, C257S732000, C174S522000, C361S760000, C361S762000, C361S772000, C361S792000, C361S795000, C029S854000, C029S856000
Reexamination Certificate
active
06677669
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to semiconductor devices and more particularly to a semiconductor device including at least two co-packaged semiconductor dies.
Co-packaged devices, commonly referred to as copaks, are well known. Typically, such devices include two or more identical or different semiconductor devices that are packaged in a common housing. The benefit achieved by such an arrangement is a more compact electronic package which occupies less space on the circuit board than would be consumed by individually packaged semiconductor dies used for the same function within a circuit. This saving in space naturally allows for construction of a more compact device and/or more complicated devices having more electronic parts in the same space.
Many copak devices include a molded housing and a lead frame. The housing provides protection for the semiconductor dies against environmental elements such as moisture, while the lead frame is used to-connect the semiconductor dies to external elements within a circuit. This conventional arrangement requires, therefore, several parts which not only add to the cost of the copak, but also complicate its manufacturing. It is, therefore, desirable to have a copak device having two or more devices contained therein, while reducing the number of parts required for its assembly.
SUMMARY OF THE INVENTION
A semiconductor device according to the present invention includes at least two identical or dissimilar semiconductor dies. The two semiconductor dies are co-packaged within a common outer metal clip which may serve as an external connector for at least one of the semiconductor dies.
According to the first aspect of the invention, two identical or dissimilar semiconductor dies are contained within an outer clip, which serves both as a housing for the dies and an electrical connector for connecting one of the dies to external elements in an electronic circuit.
Specifically, a co-packaged semiconductor device according to the invention includes a metal can having a substantially flat web portion and a plurality of walls defining a space. A first semiconductor die, which may be a MOSFET, is connected electrically at its drain electrode to the web portion by a conductive layer, which may be a layer of solder or conductive epoxy. Two raised portions extending from edges of two opposing walls of the outer clip make connection to corresponding electrical pads on a substrate such as a circuit board, thereby connecting the drain electrode of the MOSFET to its appropriate place within an electronic circuit.
A second semiconductor die is disposed within an inner clip, which clip is connected to but insulated from the web portion of the outer clip by an insulation layer. The second semiconductor die may be a MOSFET identical to the first semiconductor die, or an integrated circuit formed on a semiconductor chip for controlling the operation of the first semiconductor die.
According to the first aspect of the present invention, the thickness of the first semiconductor die and the total height of the inner clip and the second semiconductor die are equal such that their respective top surface, are coplanar with one another, and preferably coplanar with contact surfaces of the raised portions. To achieve this result, the second semiconductor die may be ground to reduce its thickness.
The inner clip according to the present invention includes a bottom plate and a plurality of walls extending substantially vertically from the edges of the bottom plate. At least one of the walls of the inner clip includes an extended portion which is bent to define a contact surface that is preferably coplanar with the raised portions of the outer clip. The contact surface of the inner clip makes contact with an appropriate pad on a substrate to connect the second semiconductor die to its position within an electronic circuit. Preferably, the exterior surface of the inner clip is chemically treated to create an insulated surface, or insulated by an electrically insulating polymer layer, such as polyimide. The interior surface of the inner clip is preferably coated with a highly conductive metal such as silver. The inner clip can be formed by raising the edges of a copper foil to create substantially vertical walls that at least partially receive the second semiconductor die.
A co-packaged semiconductor device according to the second embodiment of the present invention includes an outer clip which may be a metal can substantially similar to the one used in the first embodiment. The semiconductor device according to the second embodiment includes at least two identical or dissimilar semiconductor dies each having at least one of its major electrodes connected electrically to the web portion of the outer clip by a conductive layer of solder or conductive epoxy. In this embodiment, the outer clip serves both as a housing for the semiconductor dies and a connector for connecting the devices to an external element within an electronic circuit.
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International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Williams Alexander O.
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