Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2007-09-25
2007-09-25
Lee, Hsien-Ming (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S687000, C257S698000, C257S700000, C438S612000, C438S614000
Reexamination Certificate
active
11137803
ABSTRACT:
A semiconductor device package includes a substrate, first and second chip pads spaced apart over a surface of the substrate, and an insulating layer located over the surface of the substrate. The insulating layer includes a stepped upper surface defined by at least a lower reference potential line support surface portion, and an upper signal line support surface portion, where a thickness of the insulating layer at the lower reference potential line support surface portion is less than a thickness of the insulating layer at the upper signal line support surface portion. The package further includes a conductive reference potential line electrically connected to the first chip pad and located on the lower reference potential support surface portion of the insulating layer, a conductive signal line electrically connected to the second chip pad and located on the upper signal line support surface portion, and first and second external terminals electrically connected to the conductive reference potential line and the conductive signal line, respectively.
REFERENCES:
patent: 4866507 (1989-09-01), Jacobs et al.
patent: 5135889 (1992-08-01), Allen
patent: 5665650 (1997-09-01), Lauffer et al.
patent: 5814848 (1998-09-01), Oshima
patent: 6211576 (2001-04-01), Shimizu et al.
patent: 6326701 (2001-12-01), Shinogi et al.
patent: 6462423 (2002-10-01), Akram et al.
patent: 6501169 (2002-12-01), Aoki et al.
patent: 6589864 (2003-07-01), Yiu et al.
patent: 6608377 (2003-08-01), Chang et al.
patent: 6664644 (2003-12-01), Morozumi
patent: 2003/0011068 (2003-01-01), Song et al.
patent: 1020020063675 (2002-08-01), None
Baek Seung-Duk
Jang Dong-Hyeon
Lee Jong-Joo
Lee Hsien-Ming
Volentine & Whitt PLLC
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