Semiconductor package having recessed die cavity walls

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Details

357 68, H01L 2312, H01L 2304

Patent

active

049262408

ABSTRACT:
A semiconductor package having recessed die cavity walls to prevent rejectable packages due to excess die attach material overflow. A recessed area is disposed beneath a wire bond shelf and serves as an area into which excess die attach material may flow so that it does not impede wire bonding by flowing onto the bond posts disposed on the wire bond shelf or the bond pads disposed on the top of a semiconductor die.

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