Semiconductor package having plural chips side by side...

Details Semiconductor package having plural chips side by side... Semiconductor package having plural chips side by side...

2008-09-22

2009-12-15

Clark, S. V (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S666000

Reexamination Certificate

active

07633143

ABSTRACT:
A semiconductor package with multiple chips side-by-side disposed on a leadframe is revealed, primarily comprising a plurality of leads of a leadframe, a first chip, a second chip, and an encapsulant to encapsulate the chips where the chip thickness of the second chip is larger than the one of the first chip. The first chip and the second chip are individually disposed on a first die-attaching area and on a second die-attaching area of the leads or a die pad of the leadframe. The second die-attaching area is downset relative to the first die-attaching area in a manner that a bottom surface of the encapsulant is closer to the second die-attaching areas than to the first die-attaching areas. Therefore, when chips with different thicknesses are side-by-side disposed, there is no unbalanced mold flow nor package warpage issue.

REFERENCES:
patent: 5057906 (1991-10-01), Ishigami
patent: 6307257 (2001-10-01), Huang et al.
patent: 7449774 (2008-11-01), Jeun et al.
patent: 2002/0140068 (2002-10-01), Lee et al.
patent: 2002/0153599 (2002-10-01), Chang et al.

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