Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-06-26
2003-03-04
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S796000
Reexamination Certificate
active
06528876
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor packages and, more particularly to a semiconductor package having a heat sink for improving heat dissipating efficiency.
BACKGROUND OF THE INVENTION
In recent years, semiconductor devices are in the rapid development for high integration, miniaturization and high performance with the trends of producing downsized electronic devices of high performance. The use of a ball-grid-array (BGA) substrate in a semiconductor device can maximize the number of input/output connections and allow a semiconductor chip adhered to the ball-grid-array substrate to have an increased density of built-in electronic components and electric circuits, contributing to the miniaturization and high performance of semiconductor devices. The semiconductor chip encapsulated in a ball-grid-array semiconductor device may contain higher density of electronic circuits and electronic components, but the heat generated therefrom during operation will significantly increase. Also the encapsulation body used to encapsulate the semiconductor chip is made of resin material with poor thermal conductivity. As a result, if the thermal dissipating efficiency of the ball-grid-array semiconductor device is not satisfactory, the electronic performance and operable life of the semiconductor device would be adversely affected.
Various methods of providing satisfactory heat dissipation to BGA semiconductor devices have been proposed. An example of a semiconductor device with an incorporated heat sink is illustrated in
FIG. 9. A
semiconductor chip
10
is mounted on a substrate
11
, on which a heat sink
12
is mounted by thermosetting adhesive
13
. An encapsulation body
14
formed by molding resin is then used to encapsulate the semiconductor chip
10
and heat sink
12
. The heat sink
12
of the semiconductor device consists of a flat portion
15
and a supporting portion
16
connecting to the flat portion
15
. The supporting portion
16
of the heat sink
12
is arranged in a manner to allow the flat portion
15
of the heat sink
12
to be separated from the substrate
11
. Thus after mounting the heat sink
12
onto the substrate
11
, the semiconductor chip
10
is positioned underlying the flat portion
15
of the heat sink
12
.
The above-mentioned semiconductor package, however, still has drawbacks. During the process of adhering the heat sink
12
to the substrate
11
, the heat sink
12
tends to be dislocated from a predetermined position on the substrate
11
. The foregoing problem is usually caused by vibration of the equipment used for adhering the heat sink
12
to the substrate
11
and inadvertent operation during the adhering process. Moreover, the dislocation of the heat sink
12
may cause the heat sink
12
to be in contact with gold wires
17
that electrically connect the semiconductor chip
10
and the substrate
11
, thereby resulting in a reliability problem of the product thus-obtained.
SUMMARY OF THE INVENTION
It is therefore the objective of the present invention to provide a semiconductor package having a heat sink that can be securely positioned on the substrate. As the heat sink can be securely positioned on the substrate, dislocation problem of the heat sink can be eliminated and the reliability of the semiconductor devices can be enhanced.
To achieve the above and other objectives of the present invention, a semiconductor device is provided to include: a substrate having a first surface, a second surface opposing the first surface, a die-attach region formed on the first surface of the substrate, a plurality of positioning holes formed on the substrate and arranged peripherally around the die-attach region; a semiconductor chip attached to the die-attach region of the substrate and electrically connected to the substrate; a heat sink composed of a flat portion, a supporting portion integrally formed with the flat portion so as to elevate the flat portion to a predetermined height above the semiconductor chip, and a plurality of positioning portions protruded form the bottom of the supporting portion for being engaged with the corresponding positioning holes of the substrate to thereby securely fix the heat sink in position to the substrate; a plurality of electrical conductive elements disposed on the second surface of the substrate; and an encapsulation body which encapsulates the entire semiconductor chip and at least a portion of the heat sink.
The substrate usually consists of a core layer having a top surface, a bottom surface opposing the top surface, a plurality of electrically conductive traces formed on at least one of the top surface and the second surface of the core layer, and solder mask layers formed on the top and bottom surfaces of the core layer.
In a preferred embodiment of the invention, a plurality of through holes are formed within an area of the core layer without formation of the electrically conductive traces. After the coating process of applying the solder mask onto the top surface and the bottom surface of the core layer is completed, a conventional etching process or the like is employed to remove the solder mask formed above the through holes and a portion of the solder mask filled within the through holes, so as to form the positioning holes that extend from the first surface of the substrate to an inner portion of the core layer. This allows each of the positioning holes to have one end exposed to the first surface of the substrate and another end closed by the solder mask.
In another embodiment of the invention, a plurality of through holes are formed on an area of the core layer which is free of electrically conductive traces. By a conventional etching process or the like following applying the solder mask over the core layer, the solder mask above the through holes, within the through holes, and below the through holes is removed to form the positioning holes. Thus the positioning holes extend through the substrate.
In still another embodiment of the present invention, on the ground pad formed on the terminal of each of the ground conductive traces an opening is formed, allowing a positioning hole to form by removing the solder mask above and within the opening by conventional etching technique. The positioning hole thus-formed therefore extends from the first surface of the substrate to the top surface of the core layer. As a result, the heat sink can be not only securely fixed to the substrate by the engagement of the positioning portions of the heat sink with the positioning holes formed on the substrate, but also electrically connected to the ground conductive traces on the substrate. Therefore, the electrical performance of the semiconductor package of this invention can be enhanced.
In still another embodiment of the present invention, a plurality of through holes are formed on predetermined positions of the core layer. Each of the through holes is arranged to connect an opening formed on the terminal of each of the ground conductive traces on the core layer. Therefore, a positioning hole can be formed by removing the solder mask above the opening, within the opening and in the upper portion of the through hole via conventional etching technique or the like. By this arrangement, the heat sink is allowed to have an electrical-connection relationship with the ground conductive traces on the substrate, in addition to the secure fixing of the heat sink to the substrate.
In still another embodiment of the present inventions, the formation of a positioning hole is achieved by removing the solder mask above and within an opening formed on the ground pad of the terminal of the ground conductive trace, the solder mask within a through hole formed in the substrate relative in position to the opening and the solder mask below the through hole. Therefore, the positioning hole extends through the substrate.
In still another embodiment of the present invention, the formation of a positioning hole includes an opening formed on the ground pad connected to the terminal of the ground conductive trace
Corless Peter F.
Edwards & Angell LLP
Ho Tu-Tu
Jensen Steven M.
Nelms David
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