Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Patent
1996-11-18
1999-03-02
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
257711, 257702, 257730, 438121, 438125, H01L 23053, H01L 2314, H01L 2304
Patent
active
058775510
ABSTRACT:
A semiconductor package is provided that has a rigid metal substrate and a dielectric layer covering a first portion of the rigid metal substrate, with a second portion of the rigid metal substrate being substantially free of the dielectric layer. A semiconductor device is electrically bonded to the second portion of the rigid metal substrate and metal circuit traces defining electrical paths are formed on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one via in the dielectric layer. Additionally, a method is provided for grounding a semiconductor device and at least one circuit trace on a rigid metal substrate substantially covered by a dielectric layer, which includes creating at least one via in the dielectric layer using a laser and creating circuit traces on the dielectric layer, at least one of which contacts the rigid metal substrate through at least one of the vias. The semiconductor is electrically bonded to the rigid metal substrate in an aperture in the dielectric layer.
REFERENCES:
patent: 4040083 (1977-08-01), Saiki et al.
patent: 4447824 (1984-05-01), Logan et al.
patent: 4508749 (1985-04-01), Brannon et al.
patent: 4712062 (1987-12-01), Takamine
patent: 4839717 (1989-06-01), Phy et al.
patent: 4894115 (1990-01-01), Eichelberger et al.
patent: 4915981 (1990-04-01), Traskos et al.
patent: 4940881 (1990-07-01), Sheets
patent: 5091768 (1992-02-01), Yamazaki
patent: 5108553 (1992-04-01), Foster et al.
patent: 5194713 (1993-03-01), Egitto et al.
patent: 5231751 (1993-08-01), Sachdev et al.
patent: 5245751 (1993-09-01), Locke et al.
patent: 5315147 (1994-05-01), Solomon
patent: 5374176 (1994-12-01), Jang
patent: 5386430 (1995-01-01), Yamagishi et al.
patent: 5397863 (1995-03-01), Afzali-Ardakani et al.
patent: 5438478 (1995-08-01), Kondo et al.
patent: 5457057 (1995-10-01), Nath et al.
patent: 5457340 (1995-10-01), Templeton, Jr. et al.
patent: 5504372 (1996-04-01), Braden et al.
patent: 5561323 (1996-10-01), Andros et al.
Brathwaite George A.
Erfe George A.
Hoffman Paul R.
Pedron, Jr. Serafin P.
Raftery Michael A.
Clark Jhihan B.
Olin Corporation
Rosenblatt Gregory S.
Saadat Mahshid D.
LandOfFree
Semiconductor package having a ground or power ring and a metal does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor package having a ground or power ring and a metal , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package having a ground or power ring and a metal will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-425536