Semiconductor package featuring metal lid member

Details Semiconductor package featuring metal lid member Semiconductor package featuring metal lid member

2007-08-07

2007-08-07

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S778000

Reexamination Certificate

active

11495737

ABSTRACT:
In a semiconductor package, a semiconductor chip is mounted on a wiring board or package board. A lid member defines a recess for accommodating the semiconductor chip, and is mounted on the package board so that the semiconductor chip is accommodated in the recess of the lid member. A first adhesive layer is formed on the package board so that a peripheral portion of the lid member is adhered on the package board with the first adhesive layer. A second adhesive layer is formed on the semiconductor chip so that a central portion of the lid member is adhered to the semiconductor chip with the second adhesive layer. The following relationship is established:in-line-formulae description="In-line Formulae" end="lead"?25 μm≦h−d≦300 μmin-line-formulae description="In-line Formulae" end="tail"?where: “d” is a depth of the recess of the lid member; and “h” is a sum of a thickness of the semiconductor chip and a thickness of the second adhesive layer.

REFERENCES:
patent: 5572070 (1996-11-01), Ross
patent: 5821161 (1998-10-01), Covell et al.
patent: 5881944 (1999-03-01), Edwards et al.
patent: 6292369 (2001-09-01), Daves et al.
patent: 2000-150695 (2000-05-01), None
patent: 2001-210761 (2001-08-01), None

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