Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Reexamination Certificate
2007-06-05
2007-06-05
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
C257SE27137
Reexamination Certificate
active
11315061
ABSTRACT:
Disclosed are a semiconductor package device and a method for fabricating the semiconductor package device. The semiconductor package has a semiconductor chip including a plurality of bonding pads having a microscopic size and aligned at a minute interval, a planar layer formed on the semiconductor chip so as to expose the bonding pads, metal patterns formed on the planar layer and having a size larger than a size of the bonding pads in such a manner that at least some parts of the metal patterns are connected to the bonding pads and a seed metal layer interposed between the planar layer and the metal patterns. When the bonding pads have microscopic size and aligned at a minute interval, a wire-bonding process is carried out by using the metal patterns having the size larger than the size of the bonding pads and covering the bonding pad region, as a connection part to the bonding pads. Thus, the bonding pad region is reduced by 50 to 80% so that the number of chips in the semiconductor chip is increased.
REFERENCES:
patent: 6689637 (2004-02-01), Park
patent: 6856026 (2005-02-01), Yamada et al.
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Lindsay, Jr. Walter
Stevenson André
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