Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1999-03-03
2002-03-19
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S124000, C257S666000
Reexamination Certificate
active
06358778
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor package having a semiconductor device such as integrated circuit mounted thereon, and a method of producing the same.
2. Description of the Related Art
A method of producing a semiconductor package of the prior art will be described below with reference to
FIGS. 5A-5B
.
FIG. 5A
is a partially cutaway view showing a semiconductor package prior to the removal of unnecessary portions of a lead frame thereof,
FIG. 5B
is a cross sectional view showing the semiconductor package shown in
FIG. 5A
, and
FIG. 5C
is a cross sectional view showing the semiconductor package being completed. In the drawings, numeral
11
denotes the lead frame,
22
denotes a terminal of the lead frame
11
,
3
denotes a die pad area of the lead frame
11
whereon a semiconductor device is to be mounted,
4
denotes a semiconductor device,
5
denotes a wire for connecting an electrode (not shown) of the semiconductor device
4
and the terminal
22
,
6
denotes a die bonding material for bonding the semiconductor device
4
onto the die pad
3
, and
7
denotes a sealing resin.
The method of producing a semiconductor package of the prior art will be described below. The terminals
22
and the die bond pad
3
are part of the lead frame
11
, consisting of a thin metal sheet and formed by etching or stamping. The semiconductor device
4
, such as an IC is fastened onto the die bond pad
3
by means of the die bonding material
6
. Then the electrodes of the semiconductor device
4
and the terminals
22
of the lead frame
11
are electrically connected by means of wires
5
, such as gold wire. Further, the sealing resin
7
, such as epoxy resin, is formed using a sealing mold, and the terminals
22
are cut off from the lead frame
11
on the outside of the sealing resin
7
, thereby completing the semiconductor package shown in
FIG. 5C. A
metal ball may be provided on an exposed surface of the terminal
22
on the bottom face of the package. Alternatively, a configuration that may also be employed as the die pad
3
is lifted in the direction of top surface of the package and, after forming the resin seal, the die pad
3
is embedded in the sealing resin
7
.
In the semiconductor package of the prior art where the terminals
22
, which are external terminals of the package are disposed on the lower surface of the package as described above, the terminals
22
extend to the inside toward the semiconductor device
4
, from the lead frame
11
which surrounds the package. Thus the terminals
22
can only be formed in one line along the periphery of the package, while spaces for securing the terminals are required between the terminals
22
. Consequently, there has been a limitation on the number of terminals which can be provided. In order to solve this problem, Japanese Patent Kokai Publication No.139259/1996, for example, discloses a lead frame in which external terminals are arranged in a 2-dimensional configuration, for example in a lattice configuration, along the lead forming surface, which is made by applying a resist on a thin metal sheet used for making the lead frame after cleaning it, and performing exposure, development and etching processes using appropriate patterns. However, this method employs a photolithographic step for making the lead frame and therefore ensures high processing accuracy but requires complicated steps thus leading to a high production cost.
The semiconductor package of the prior art also has a problem in that the resin is squeezed into a space between the lower surface of the terminals
22
and the mold by the pressure of the resin during the forming process by the resin forming mold in contact with the lower surface of the terminals
22
, thus leading to the formation of resinous burrs
8
shown in
FIG. 6
which require removal after molding.
SUMMARY OF THE INVENTION
The present invention has been accomplished to solve the problems described above, and an object of the present invention is to provide a method of producing a semiconductor package wherein there are fewer limitations imposed on the terminal layout of the lead frame and on the number of terminals, and resinous burrs are not formed on the lower surface of the terminals, thereby making it possible to obtain a semiconductor package which allows a high degree of freedom in the design of terminals and a high productivity.
The method of producing the semiconductor package according to the present invention comprises the steps of forming at least such portions of a lead frame that would make terminals by using a die in a condition of being punched halfway in a protruding configuration on the side thereof where a semiconductor device is to be mounted; mounting the semiconductor device on the lead frame to connect electrodes of the semiconductor device with the protruding terminals; covering the semiconductor device mounting side of the lead frame with a resin to seal it; and separating to remove unnecessary portions of the lead frame.
The present invention also provides a method comprising the steps of forming a plating film of an individual metal such as Ni, Cu, Ag, Au and Pd or a combination thereof on the lead frame surface; forming at least such portions of a lead frame that would make terminals by using a mold in a condition of being punched halfway in protruding configuration on the side thereof where a semiconductor device is to be mounted; mounting the semiconductor device on the lead frame to connect electrodes of the semiconductor device with the protruding terminals; covering the semiconductor device mounting side of the lead frame with a resin to seal it; and separating to remove unnecessary portions of the lead frame.
The present invention also provides a method comprising the steps of forming a plating film of an individual metal such as Ni, Cu, Ag, Au and Pd or a combination thereof on the lead frame surface; forming a resin film having high heat resistance on the side thereof where semiconductor device is to be mounted; forming at least such portions of a lead frame that would make terminals by using a mold in a condition of being punched halfway in protruding configuration on the side thereof where semiconductor device is to be mounted; removing the resin film from at least the top surfaces of the protruding terminals of the lead frame; mounting the semiconductor device on the lead frame to connect electrodes of the semiconductor device with the protruding terminals; covering the semiconductor device mounting side of the lead frame with a resin to seal it; and separating to remove unnecessary portions of the lead frame.
The present invention also provides a method wherein the unnecessary portions of the lead frame are separated to remove by a mechanical means.
The present invention also provides a method wherein the unnecessary portions of the lead frame are separated to remove by a chemical means.
The present invention also provides a method wherein the electrodes of the semiconductor device and the terminals are connected by wire bonding using thin metal wires of gold, aluminum or the like.
The present invention also provides a method wherein the electrode s of the semiconductor device and the terminals are connected by flip chip bonding using bumps made of solder, gold or an electrically conductive resin.
The semiconductor package according to the present invention is made by one of the methods of producing the semiconductor package described above, and comprises a semiconductor device mounted on a lead frame; a wire or bump for electrically connecting electrodes of the semiconductor device and terminals of the lead frame; and a resin seal for covering the semiconductor device mounting side of the lead frame.
The terminals of the lead frame are disposed in a plurality of lines along the periphery of the semiconductor device mounting area.
The lead frame is made of a copper alloy.
According to the present invention, as described above, at least such portions of a lead frame that would
Chaudhuri Olik
Duy Mai Anh
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
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