Semiconductor package bond post configuration

Details Semiconductor package bond post configuration Semiconductor package bond post configuration

1997-07-07

1999-04-27

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257737, 257778, 257786, H01L 23495

Patent

active

058982132

ABSTRACT:
A bond post configuration for wire bonded semiconductors has bond posts grouped in three posts where two are arranged closely to a side of a die about a first axis and a third is arranged in between and further removed from the side about a second axis. In one form, the bond post configuration is a radial configuration. Additionally, conductive traces which extend from the bond posts and away from the die are placed off-center from the the bond posts about the first axis to provide more placement area for the bond posts arranged about the second axis. The bond post configuration may be utilized in any wire bonded semiconductor.

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"Construction Analysis of the Intel A80502-120 Pentium Processor", Report No. SUB9506-02, Integrated Circuit Engineering Corporation, Jun. 1995, 2 pp.

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