Semiconductor package based on lead-on-chip architecture,...

Details Semiconductor package based on lead-on-chip architecture,... Semiconductor package based on lead-on-chip architecture,...

2008-03-25

2008-03-25

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

C257S677000

Reexamination Certificate

active

11192981

ABSTRACT:
A leadframe includes a multiplicity of leads. The leads have a board level contact portion, an intermediate portion and a chip level contact portion. The intermediate portion is disposed between the board level contact portion and the chip level contact portion. The board level contact portions extend from one of the first side or the second side of the semiconductor device along a second direction. The chip level contact portions extend along the first direction. Ends of the chip level contact portions are aligned along a line extending along the second direction. This leadframe can be included with a semiconductor chip in a packaged integrated circuit.

REFERENCES:
patent: 4989068 (1991-01-01), Yasuhara et al.
patent: 6433421 (2002-08-01), Masuda et al.
patent: 6714418 (2004-03-01), Frankowsky et al.
patent: 2003/0107121 (2003-06-01), Roohparvar
patent: 2004/0164422 (2004-08-01), Lee
patent: 2004/0212053 (2004-10-01), Koh et al.
patent: 0 329 317 (1989-08-01), None
ESPI Kovar Datasheet (http://www.espimetals.com/tech/kovar.pdf).

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