Semiconductor package and structure thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S692000, C257S777000, C438S109000

Reexamination Certificate

active

06949818

ABSTRACT:
A semiconductor package includes a semiconductor chip connected to lead frames by wires and outer leads protruding from the semiconductor package. At this time, the outer leads are connected to the lead frames and grooves into which the outer leads are inserted into are provided in the semiconductor package, wherein the grooves are connected the lead frames. In mounting a first and a second semiconductor package, the outer leads of the first semiconductor package are inserted into the grooves of the second semiconductor package.

REFERENCES:
patent: 5498902 (1996-03-01), Hara
patent: 5706172 (1998-01-01), Lee
patent: 5834836 (1998-11-01), Park et al.
patent: 6040621 (2000-03-01), Nose
patent: 6080931 (2000-06-01), Park et al.
patent: 6522020 (2003-02-01), Hong

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