Semiconductor package and method therefor

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S773000, C257S786000, C257S787000, C257SE23031, C257SE23043, C257SE23046, C257SE23061

Reexamination Certificate

active

07825505

ABSTRACT:
In one embodiment, a semiconductor package is formed to include a tamper barrier that is positioned between at least a portion of the connection terminals of the semiconductor package and an edge of the semiconductor package.

REFERENCES:
patent: 5656550 (1997-08-01), Tsuji et al.
patent: 6611063 (2003-08-01), Ichinose et al.
patent: 6964888 (2005-11-01), Bai
patent: 7247526 (2007-07-01), Fan et al.
patent: 7348663 (2008-03-01), Kirloskar et al.
patent: 2003/0151113 (2003-08-01), Hiraga
patent: 2005/0263864 (2005-12-01), Islam et al.
patent: 2007/0126094 (2007-06-01), Shojaie et al.

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