Semiconductor package and method of manufacturing the same

Details Semiconductor package and method of manufacturing the same Semiconductor package and method of manufacturing the same

2005-11-01

2005-11-01

Thai, Luan (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Insulative housing or support

C438S126000, C438S127000, C438S108000, C438S612000, C438S613000

Reexamination Certificate

active

06960494

ABSTRACT:
A semiconductor package has (a) a package base, (b) package terminals formed on the package base and used to connect the semiconductor package to another device, (c) a wiring layer formed on the package base and electrically connected to the package terminals, (d) a semiconductor chip mounted on the package base and electrically connected to the wiring layer, (e) a low-elasticity resin layer formed between a resin mold and the wiring layer and between the package base and the resin mold, and (f) the resin mold sealing the package base, the wiring layer, the semiconductor chip, and the low-elasticity resin layer.

REFERENCES:
patent: 5874784 (1999-02-01), Aoki et al.
patent: 5990546 (1999-11-01), Igarashi et al.
patent: 6166433 (2000-12-01), Takashima et al.
patent: 6340793 (2002-01-01), Yaguchi et al.
patent: 6469373 (2002-10-01), Funakura et al.
patent: 08-078574 (1996-03-01), None
patent: 11-340380 (1999-12-01), None
patent: 2000-164761 (2000-06-01), None
patent: 2001-127095 (2001-05-01), None
Notification of Reason(s) for Refusal issued by Korean Patent Office, mailed Sep. 24, 2004, in Korean application No. 10-2002-16393, and English translation of Notification.

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