Semiconductor package and method of fabricating same

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C257S666000, C257S668000, C257S669000, C257S670000

Reexamination Certificate

active

07067357

ABSTRACT:
A semiconductor package includes a semiconductor chip provided with a plurality of electric terminals and a plurality of electrically conductive members electrically connected with the electric terminals. Connection terminals that are spherical in shape and made of solder are electrically connected with the electrically conductive members. A sealing member is used for sealing the semiconductor chip and the electrically conductive members, and for covering the connection terminals so as to allow a part thereof to be exposed. The electrically conductive members are provided with bonding promoters and are connected with the respective spherical connection terminals at the respective bonding promoters.

REFERENCES:
patent: 5999413 (1999-12-01), Ohuchi et al.
patent: 6187612 (2001-02-01), Orcutt
patent: 6392158 (2002-05-01), Caplet et al.
patent: 6534337 (2003-03-01), Mahle et al.
patent: 2001/0013645 (2001-08-01), King et al.
patent: 2002/0027441 (2002-03-01), Akram et al.
patent: 05-036894 (1993-02-01), None
patent: 08-306853 (1996-11-01), None
patent: 11-274367 (1999-10-01), None
patent: 11-345899 (1999-12-01), None
patent: 2000-326144 (2000-08-01), None

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