Semiconductor package and method for manufacturing the same

Details Semiconductor package and method for manufacturing the same Semiconductor package and method for manufacturing the same

2002-06-04

2004-12-14

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S107000, C438S108000, C257S678000

Reexamination Certificate

active

06830955

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates, in general, to a semiconductor and method for manufacturing the same and, more particularly, to a semiconductor that is thin and has a satisfactory heat dissipation capacity and method for manufacturing the same.
2. Description of the Prior Art
Currently, semiconductor packages, such as Ball Grid Array (“BGA”) semiconductor packages Chip Scale semiconductor packages, and micro ball grid array semiconductor packages, are being miniaturized.
In addition, semiconductor chips in such packages are increasing in performance, function, and operation frequency. Consequently, the semiconductor chips generate more heat.
Of such semiconductor packages, a conventional BGA semiconductor package is illustrated in FIG.
14
.
The BGA semiconductor package generally comprises a semiconductor chip
1
′, on which input and output pads are formed, and a circuit board
10
′ onto which the semiconductor chip
1
′ is bonded at the center of the circuit board
10
′ by means of a bonding agent
3
′.
The circuit board
10
′ comprises a film
15
′, upper circuit patterns
12
a
′ and lower circuit patterns
12
b
′. The upper circuit patterns
12
a
′ include bond fingers
11
′ and are formed on the outer area of the upper surface of the film
15
′. The lower circuit patterns
12
b
′ include a plurality of ball lands
13
′ and are formed on the lower surface of the film
15
′. The bond fingers
11
′ and ball lands
13
′ are conductive thin films made of copper (Cu) or the like. The upper and lower circuit patterns are connected to each other by conductive via holes
14
′. The upper and lower surfaces of the circuit board
10
′, except for the bond fingers
11
′ and the ball lands
13
′, are coated with a cover coat
16
′ so as to protect the circuit patterns from the external environment.
The input and output pads
2
′ of the semiconductor chip
1
′ are connected with the bond fingers
11
′ formed on the upper surface of the circuit board
10
′ through a conductive wire
4
′. The upper surface of the circuit board
10
′, the chip
1
′ and the conductive wire
4
′ are covered with an encapsulating material
20
′ so as to protect the chip
1
′ and the conductive wires
4
′.
A plurality of conductive balls
40
′ are fusion-welded on the ball lands
13
′. The semiconductor package
100
′ is mounted to a motherboard (not shown), with the conductive balls
40
′ being fusion welded on metallizations of the motherboard, so that electric signals may be mediated between the semiconductor chip
1
′ and the motherboard by the conductive balls
40
′.
In the BGA semiconductor package having the construction described above, the semiconductor chip
1
′ exchanges electric signals with the motherboard through the input and output pads
2
′, the conductive wire
4
′, the bond fingers
11
′, the via holes
14
′, the ball lands
13
′ and the conductive balls
40
′.
However, according to the conventional semiconductor package, a semiconductor chip
1
′ is bonded on the upper surface of a relatively thick circuit board
10
′, thereby increasing a total thickness of the entire semiconductor package. This contrasts with the current trend toward miniaturization of packages, and so the package may not be fit for use in the latest mobile phones, cellular phones, radio pagers, and notebook computers.
In addition, the conventional semiconductor package does not provide means for dissipating heat. Such heat may lead to performance reduction and/or breakdown of the semiconductor package or a device employing the semiconductor package. Although another semiconductor package employing a heat spreader has been disclosed, this semiconductor package generates other problems, in that the thickness of this package is increased due to the addition of the heat spreader. Moreover, the manufacturing cost of such a package is expensive.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a semiconductor package and method for manufacturing the same, capable of reducing the thickness of the semiconductor package considerably.
Another object of the present invention is to provide a semiconductor package and method for manufacturing the same, capable of dissipating heat to the outside environment easily and effectively.
A further object of the present invention is to provide a semiconductor and method for manufacturing the same, capable of preventing a circuit board on which circuit patterns are formed, from being bent.
In order to accomplish the above objects and others, one embodiment of the present invention provides a semiconductor package that includes semiconductor chip having a first surface and a second surface, wherein a plurality of input and output pads are formed on one of the first and second surfaces; a circuit board comprising a thin film having a first surface, an opposite second surface, and a center hole in which the semiconductor chip is positioned; a plurality of circuit patterns on the first surface of the thin film, including a plurality of bond fingers and ball lands; a cover coat covering the circuit board except for the bond fingers and the ball lands; electrical conductors that electrically connect the input and output pads of the semiconductor chip with the bond fingers of the circuit board; an encapsulation material covering the semiconductor, the electrical conductors, and a portion of the circuit board; and, a plurality of conductive balls that are fusion-welded onto the ball lands of the circuit board.
The package may further comprise a heat spreader bonded on the second surface of the film.
The second surface of the semiconductor chip, one surface of the heat spreader and one surface of the encapsulation material may lie on the same plane.
The second surface of the semiconductor chip, the second surface of the film and one surface of the encapsulation material may lie on the same plane.
The second surface of the semiconductor chip and one surface of the encapsulation material may lie on the same plane.
The second surface of the film may be entirely covered with the film.
The second surface of the film may be partially covered with the film.
The input and output pads may be formed on the first surface of the semiconductor chip.
The input and output pads may be formed on the second surface of the semiconductor chip.
The first surface of the semiconductor chip and one surface of the encapsulation material may lie on the same plane.
In addition, the present invention provides a method of manufacturing a semiconductor package. One embodiment of such a method includes providing a circuit board, the circuit board having a film, circuit patterns and a plurality of holes, the film having a first surface and a second surface, the circuit patterns including a plurality of bond fingers and ball lands formed on one of the first and second surfaces; respectively positioning a plurality of semiconductor chips in the holes of the circuit board, each of the semiconductor chips having a first surface and a second surface, a plurality of input and output pads being formed on one of the first and second surfaces of semiconductor chips; electrically connecting the input and output pads of each semiconductor chip with the bond fingers of the respective circuit board; covering the semiconductor chips, connection means and a certain area of the circuit board with an encapsulation material; and forming input and output pads by respectively fusion-welding conductive balls on ball lands of the circuit board.
The circuit board may comprise a film, a plurality of circuit patterns and a cover coat, the film having a first surface and a second surf

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