Semiconductor package and method for making the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Outside periphery of package having specified shape or...

Reexamination Certificate

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Details

C257S686000, C257S774000, C257SE23023, C257SE23069, C257SE23125, C438S106000, C438S127000, C361S777000

Reexamination Certificate

active

08076775

ABSTRACT:
A semiconductor package includes: a semiconductor substrate; an inner insulator layer formed on the substrate; at least one internal wiring extending from a front side of the substrate along one of lateral sides of the substrate to a rear side of the substrate; a first outer insulator layer disposed at the front side of the substrate, formed on the internal wiring, and formed with at least one wire-connecting hole; and a second outer insulator layer disposed at the rear side of the substrate, formed on the internal wiring, and formed with at least one wire-connecting hole which exposes a portion of the internal wiring.

REFERENCES:
patent: 5888884 (1999-03-01), Wojnarowski
patent: 7045899 (2006-05-01), Yamane et al.
patent: 7112469 (2006-09-01), Mihara
patent: 7633159 (2009-12-01), Boon et al.
patent: 7790505 (2010-09-01), Lin et al.
patent: 2001/0010627 (2001-08-01), Akagawa
patent: 2005/0051886 (2005-03-01), Mihara et al.
patent: 2005/0161799 (2005-07-01), Jobetto
patent: 2008/0237828 (2008-10-01), Yang

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