Semiconductor package and method for fabricating same

Details Semiconductor package and method for fabricating same Semiconductor package and method for fabricating same

1997-07-16

1999-08-03

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

438121, 438123, 257712, 257713, H01L 2144

Patent

active

059337095

ABSTRACT:
A semiconductor package including a first heat slug having a substantially flat shape and a second heat slug coupled to the first heat slug. A semiconductor chip is mounted on an inner surface of the first heat slug and a third heat slug is fixed to a central portion of the semiconductor chip. A plurality of inner leads are fixed to sides of the semiconductor chip and outer leads extend from the inner leads and are bent outward with respect to the inner leads. Conductive wires connect the inner leads to the semiconductor chip. A mold portion seals the semiconductor or chip, the inner leads, a portion of the outer leads, and the conductive wire.

REFERENCES:
patent: 5091341 (1992-02-01), Asada et al.
patent: 5362679 (1994-11-01), Wakefield
patent: 5455457 (1995-10-01), Kurohawa
patent: 5533256 (1996-07-01), Call et al.
patent: 5552636 (1996-09-01), Darveaux
patent: 5552637 (1996-09-01), Yamagata
patent: 5619070 (1997-04-01), Kozono
patent: 5805427 (1998-09-01), Hoffman

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