Semiconductor package and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257SE23011

Reexamination Certificate

active

08053886

ABSTRACT:
A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. At least one penetration hole extends from one surface of the semiconductor chip to an opposite surface of the semiconductor chip. A penetration electrode is situated inside the penetration hole without contacting a wall of the penetration hole. The penetration electrode has one end fixed to the one surface of the semiconductor chip and an opposite end protruding from the opposite surface of the semiconductor chip. A connection terminal is formed on the opposite end of the penetration electrode and electrically connected to the wiring board.

REFERENCES:
patent: 5998864 (1999-12-01), Khandros et al.
patent: 7279788 (2007-10-01), Canella
patent: 7659612 (2010-02-01), Hembree et al.
patent: 7883908 (2011-02-01), Hembree et al.
patent: 2002/0110953 (2002-08-01), Ahn et al.
patent: 2006/0261491 (2006-11-01), Soeta et al.
patent: 2007/0132104 (2007-06-01), Farnworth et al.
patent: 2007/0246819 (2007-10-01), Hembree et al.
patent: 2009/0127698 (2009-05-01), Rathburn
patent: 2003-188209 (2003-07-01), None
patent: 2006-324393 (2006-11-01), None

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