Semiconductor package and manufacturing method therefor

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C174S260000, C029S843000

Reexamination Certificate

active

07484293

ABSTRACT:
A semiconductor package that has a superior high frequency characteristics and that can obtain a large area for an internal wiring pattern is provided. According to the present invention, a semiconductor package includes: a multilayer printed wiring board12, and an IC chip, mounted on the obverse face of the multilayer wiring board12, and multiple bump terminals16, mounted on the reverse face. Each bump terminal16includes an insulating core42having a flat face40and a conductive coating deposited on all external surfaces except that of the flat face40. The end faces of the conductive coatings44appear like rings around the insulating cores42, and are soldered to annular connection pads52formed on the reverse face of the multilayer printed wiring board12. Vias36are arranged immediately above the bump terminals16, and clearance holes34, the diameter of which is smaller than the diameter of the bump terminals16, are formed in internal wiring patterns28and30to permit the passage of the vias36.

REFERENCES:
patent: 5762845 (1998-06-01), Crumly
patent: 2005/0006788 (2005-01-01), Kaneko
patent: 1560911 (2005-01-01), None
patent: 06-033106 (1994-02-01), None
patent: 11054927 (1999-02-01), None
patent: 2001177010 (2001-06-01), None
patent: 2001177010 (2001-06-01), None
patent: 2002043558 (2002-02-01), None
patent: 2002043558 (2002-02-01), None
patent: 2005-5568 (2005-06-01), None
patent: 2005243231 (2005-08-01), None
patent: 2005243231 (2005-09-01), None

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