Semiconductor package

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Patent

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Details

174263, 257692, 361760, H01L 2302

Patent

active

055369073

ABSTRACT:
A semiconductor package includes a package body, a semiconductor chip disposed on the surface of the package body, external lead terminals disposed on two opposite side surfaces of the package body, a lid hermetically sealing and shielding the semiconductor chip in the package body, a package substrate having a metallized region on which the package body is mounted, and a metal layer disposed on the rear surface of the package body and connected to the metallized region of the package substrate with solder. The metal layer includes material having a good adhesion to the solder and has a pattern in which stripe-shaped metal portions abut two opposite side surfaces of the package body where the external lead terminals are absent, and stripe-shaped openings that abut the respective metal portions. Therefore, when the package body is soldered to the package substrate, unwanted flow of the melted solder is stopped at the openings in the metal layer. Therefore, solder fillets are surely produced on the side surfaces of the package body where the external lead terminals are absent, whereby the connection condition can be determined by visual inspections of the solder fillets.

REFERENCES:
patent: 4866571 (1989-09-01), Butt
patent: 5095359 (1992-03-01), Tanaka et al.

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