Semiconductor optical device and the fabrication method

Details Semiconductor optical device and the fabrication method Semiconductor optical device and the fabrication method

2002-04-18

2004-04-06

Cuneo, Kamand (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

C257S189000, C257S200000, C257S615000, C372S046012, C438S047000

Reexamination Certificate

active

06717187

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor optical device with a buried heterostructure (BH) useful for optical communication and to the fabrication method of the same. More particularly, the present invention relates to a buried structure semiconductor optical device structured such that a Ru-doped semi-insulating layer is inserted between a mesa stripe and a burying layer.
2. Description of the Related Art
As the burying layer of a semiconductor optical device such as a semiconductor laser diode or an optical modulator and the like, a current blocking layer formed by a pn buried structure and a current blocking layer formed by a semi-insulating layer are known. According to these current blocking layers, for example, currents can be concentrated on a light-emitting region in a semiconductor laser diode.
Since parasitic capacitance of the current blocking layer formed by the pn buried structure is larger than that of the current blocking layer formed by the semi-insulating layer, it is difficult to realize high-speed operation for the devices with the pn buried structure.
As for a current blocking layer using Fe-doped indium phosphide (InP) as a semi-insulating film, when a Zn-doped InP layer is used as a p type cladding layer, the conductivity of the current blocking layer near the mesa stripe is changed to p type due to inter-diffusion between Fe in the current blocking layer and Zn in the p type cladding layer, so that there occurs a problem in that resistivity of the current blocking layer becomes low. As a result, leakage current and junction capacitance increase. These problems also cause degradation of device characteristics.
That is, inter-diffusion between iron (Fe) and zinc (Zn) occurs when a Fe doped burying layer is placed adjacent to a Zn-doped cladding layer and/or a Zn-doped contact layer. The inter-diffusion causes degradation of device characteristics, especially, modulation characteristics. In addition, Zn atoms moved in an interstitial site due to inter-diffusion diffuse not only to the burying layer but also to an active layer adjacent to the Zn-doped cladding layer (in the case of the semiconductor laser diode), or to a photoabsorption layer adjacent to the Zn-doped cladding layer (in the case of the optical modulator). Thus, there is also a problem in that light emitting efficiency of the active layer is lowered, or the extinction characteristic of the photoabsorption layer is degraded.
Conventionally, there are the following technologies to solve these problems. Japanese laid-open patent application No. 10-22579 discloses a semiconductor laser diode having nondoped InAlAs as the burying layer. That is, since Fe is not doped in the burying layer, inter-diffusion between Fe and the p type dopant does not occur, so that degradation of characteristics due to inter-diffusion does not occur. However, since InAlAs is nondoped, there is a problem in that resistivity of InAlAs is low.
In addition, Japanese laid-open patent application No. 9-214045 discloses that a Fe diffusion preventing layer is inserted between a Zn-doped cladding layer and a Fe-doped InP burying layer. That is, as shown in
FIG. 1
, the Fe diffusion preventing layer
16
is inserted between the Fe-doped InP burying layer
17
and the mesa stripe which is formed by a buffer layer
12
, an active layer
13
, a cladding layer
14
and a contact layer
15
. In the Japanese laid-open patent application No. 9-214045, as a specific example of the Fe diffusion preventing layer
16
, an n-InP layer and a Fe-doped InP layer are disclosed, in which vacancy concentration of the Fe-doped InP layer is equal to or more than 5.0×10
14
cm
−3
.
However, in order to grow the Fe-doped InP layer of which vacancy concentration is equal to or more than 5.0×10
14
cm
−3
as the Fe diffusion preventing layer
16
, it is necessary to use a higher growth temperature (660° C.) than that used for growing the usual Fe-doped InP layer. Thus, thermal degradation may occur on the sides of the mesa stripe during growth.
In addition, although diffusion of Fe can be prevented by inserting an n-InP layer as the Fe diffusion preventing layer
16
, there is a problem in that leakage currents increase since resistivity of the n-type InP layer between the cladding layer and the burying layer is low.
In addition, Japanese laid-open patent application No. 61-290790 discloses that a burying layer of Fe-doped InAlAs is formed by liquid phase epitaxy. Also in this case, as mentioned above, there is a problem in that Zn—Fe inter-diffusion occurs between the Zn-doped cladding layer and the Fe-doped InAlAs burying layer.
Recently, it was found that Ru-doped semi-insulating layer rarely causes inter-diffusion between Ru and Zn. Thus, a buried structure laser diode using a Ru-doped InP layer which is a semi-insulating film as the current blocking layer is proposed in A. van Geelen et al., Appl. Physics Letters 73, No 26 pp 3878-3880 (1998), and A. van Geelen et al., 11th International Conference on Indium Phosphide and Related materials TuBl-2 (1999) for example.
FIG. 2
shows the configuration.
However, as for the Ru-doped InP burying layer proposed in the above-mentioned documents, a precipitate of Ru—P is apt to occur. Thus, there is a problem in that it becomes difficult that Ru effectively acts as the semi-insulating dopant of InP.
Therefore, in order to suppress occurrence of the Ru—P precipitate, it is necessary to grow the semi-insulating layer under very restricted conditions such as under lowered growth pressure, or lowering the supplying amount of phosphine (PH
3
), which is the source material for P, or under low growth temperature of about 580° C. or the like.
In patent DE19747996C1, when the number of hydrogen groups of the group V precursor is equal to or less than 2, the growth temperature of the Ru-doped compound semiconductor can be lower than that for PH
3
or AsH
3
with 3 hydrogen groups, which is mainly used. Since the decrease in the number of hydrogen groups reduces the decomposition temperature of the group V precursor, the growth temperature can be lowered, so that occurrence of the precipitate with Ru can be suppressed.
When growing the semi-insulating layer at the low growth temperature as mentioned above, there occurs a problem in that a defect such as hillock is apt to occur on the surface of the burying layer.
In addition, as for the Ru-doped InP, the surface of the crystal becomes very sensitive, and poor crystal habit easily occurs. Thus, depending on the condition of the surface layer after performing RIE (Reactive Ion Etching) or wet etching, a void may occur in the Ru-doped InP burying layer
30
as shown in FIG.
3
. In
FIG. 3
, the reference numeral
10
indicates an n-InP substrate,
20
indicates the semiconductor stacked body,
21
a
indicates an n-InP cladding layer,
22
a
indicates an active region formed by a MQW active layer or MQW photoabsorption layer,
23
a
indicates a p-InP cladding layer,
24
a
indicates a p-InGaAsP contact layer,
25
a
indicates a p-InGaAs contact layer,
31
a
indicates a void in the side wall of the mesa stripe, and
31
b
indicates a void in the side wall including InAlAs.
In addition, when burying a device with the active region formed by an InAlAs—InGaAlAs multiple quantum well layer that acts as the active layer or the photoabsorption layer, a void easily occurs on the side wall of the active region. Thus, there is a problem of reliability, reproducibility and the like. In addition, it is difficult to change a physical constant such as the lattice constant and the index of refraction for the InP layer and the like.
There is a method of mass transport as a method for burying the side surface of the active region as disclosed in Japanese laid-open patent application No. 8-250806, for example.
Processing damage on the side surface of the active region due to formation of the mesa stripe is removed by using wet etching. After that, the device is loaded in a growth reactor. When the g

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