Semiconductor nonvolatile memory, method of recording data...

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Reexamination Certificate

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C257S651000, C257S315000

Reexamination Certificate

active

10739215

ABSTRACT:
A memory cell structure and control of the memory operation are simplified, and the cost of production is decreased, by way of a semiconductor nonvolatile memory having a transistor including a gate electrode provided on a p-type semiconductor substrate via a gate insulating film, and a source region and a drain region, which are a pair of n-type impurity diffusion regions in the surface layer region of the semiconductor substrate at positions sandwiching the gate electrodes therebetween. A first resistance-varying portion and a second resistance-varying portion are sandwiched by the source region, drain region and channel-forming region. The n-type impurity concentration in the resistance-varying portions is lower than in the source and drain regions.

REFERENCES:
patent: 5408115 (1995-04-01), Chang
patent: 5969383 (1999-10-01), Chang et al.
patent: 6069382 (2000-05-01), Rahim
patent: 6399441 (2002-06-01), Ogura et al.
patent: 6809373 (2004-10-01), Nishizaka

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