Semiconductor nonvolatile memory for performing read...

Details Semiconductor nonvolatile memory for performing read... Semiconductor nonvolatile memory for performing read...

2005-01-04

2005-01-04

Ho, Hoai (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185200, C365S185210

Reexamination Certificate

active

06839282

ABSTRACT:
A semiconductor nonvolatile memory in which read operations are carried out during write operations, includes: a core having a plurality of cell transistors for storing data; and a write verify circuit for detecting change in a core cell transistor's characteristic during a write operation in which the gate voltage/drain current characteristic of the cell transistor is changed to a condition corresponding to stored data by injecting a charge into or extracting a charge from the core cell transistor; and further includes a write verify inhibition signal generation circuit for generating a write verify inhibition signal in order to deactivate the write verify circuit during a read operation to the core cell transistor. The generation of a mistaken verify decision by the write verify circuit, due to a change in the power supply potential accompanying large current during a read operation, is prevented, as is malfunction of the write verify.

REFERENCES:
patent: 5408432 (1995-04-01), Watanabe
patent: 6016560 (2000-01-01), Wada et al.

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