Semiconductor nonvolatile memory device

Static information storage and retrieval – Floating gate – Multiple values

Reexamination Certificate

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C365S185280

Reexamination Certificate

active

07126850

ABSTRACT:
In a nonvolatile memory device, wherein, for example, data “1” is electrically charged, while data “0” is not electrically charged, and memory cells susceptible to charge loss are included, when data in the array10is count value of “1”>count value of “0”, write data is converted to thereby make “1” to “0” and “0” to “1”, leading to number of “1”<number of “0”, so that a statistical reliability of the data in the array10is improved. The data, which is converted and written, is converted in its polarity prior to the conversion when it is read.

REFERENCES:
patent: 5818762 (1998-10-01), Maari et al.
patent: 6396736 (2002-05-01), Jyouno et al.
patent: 6577530 (2003-06-01), Muranaka et al.
patent: 2003/0151950 (2003-08-01), Tamada et al.
patent: 2003/0227811 (2003-12-01), Sugiura et al.
“Technology for Improving Reliability In Flash Memory” Chapter 5, Section 4, pp. 223-232 (Japanese), pp. 1-18 (English translation), 1988.

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