Static information storage and retrieval – Floating gate – Particular connection
Patent
1997-07-03
1998-07-07
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
36518513, 36518517, 36518533, G11C 1134
Patent
active
057779252
ABSTRACT:
A semiconductor non-volatile memory device, e.g., flash type E2 PROM capable of electrically carrying out block erasing is provided. This semiconductor device comprises a column decoder supplied with a column address signal to select a bit line, a row decoder supplied with a row address signal to select a word line, at least one NOR type memory cell array, and at least one NAND type memory cell array. In this semiconductor device, the NOR type memory cell array and the NAND type memory cell array are connected to common bit lines, and are connected to different word lines. Thus, both the NOR type and NAND type memory cell arrays are disposed on the same chip to realize one chip configuration so that improvement in the mounting area can be attained.
REFERENCES:
patent: 5717635 (1998-02-01), Akatsu
Kabushiki Kaisha Toshiba
Nelms David C.
Phan Trong
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