Semiconductor module

Details Semiconductor module Semiconductor module

2002-10-04

2004-04-27

Clark, S. V. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S723000, C257S787000

Reexamination Certificate

active

06727584

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor module such as an MCP (Module Chip Package) in which a semiconductor chip is mounted on a module substrate and is molded in a resin.
2. Description of the Background Art
A semiconductor memory device is utilized in a personal computer, a workstation and the like in some cases. In addition, in recent years the speed, degree of compactness and number of functions of personal computers have increased and, therefore, semiconductor memory devices have been required to further increase their memory capacity. In addition, the market has expanded so that a large number of low-cost memory devices are used. Therefore, further increase in the capacity of, and further reduction in costs of, semiconductor memory devices have become required.
The number of DRAMs (Dynamic Random Access Memory), from among the above described semiconductor memory devices, utilized in personal computers or the like has increased because it is advantageous from the point of view of cost per bit unit. Cost per bit unit can be reduced by increasing the diameter of wafers even in the case that the capacity is increased and, therefore, DRAMs are frequently utilized.
In a DRAM, however, cost of development, cost for high level institutions, and the like, have greatly increased together with the increase in the testing period of time and test costs accompanying the increase in capacity as well as the enhancement of microscopic processing technology so that whether or not those costs can be reduced has become a problem.
The bit configuration for the input to or output from a DRAM is conventionally 4 bits, 8 bits or 16 bits. Therefore, the variety in types of bit numbers is small. Accordingly, one module is made up of a plurality of DRAMs for general utilization. Thus, a semiconductor memory device such as a DRAM is, in many cases, utilized in a module condition.
FIGS. 27 and 28
show an example of a conventional semiconductor module (memory module). The conventional semiconductor module has a structure, wherein single chips
117
, in which bare chips
101
, mounting islands
118
, bonding wires
105
and lead frames
110
are molded into mold resin
108
, are mounted on both, front and rear, sides of a module substrate
102
, such as of an SOP (Small Outline Package) or a TSOP (Thin Small Outline Package) corresponding to a surface mounting technology wherein parts can be mounted on both sides of a printed circuit board.
In addition, development has progressed of a memory package having a basic tendency toward miniaturization and thinning together with enhancement of performance and of functions of a memory chip. Then, though an insertion system was adopted for a memory package, in recent years the forms of packages have greatly changed such that a surface mounting system has been adopted.
At present, the surface mounting system has become the main trend in place of the insertion system and further miniaturization and lightening of a package are strongly required. Up to the present, simplification of design and increase in reliability, as well as reduction in cost, have been achieved by utilizing a semiconductor module
In addition, in a conventional manufacturing process of a semiconductor module, in the case that a defective chip is discovered in a module test after the manufacture of a semiconductor module, testing and replacement of such a defective chip are carried out until such defect has been removed.
As described above, there is a problem with the conventional semiconductor module wherein a plurality of single memory chip ICs (Integration Circuits) in the form of packaged single chips
117
are mounted on semiconductor module substrate
102
, as shown in
FIGS. 27 and 28
, and therefore, the mounting area of the single memory chip ICs becomes large.
Thus, in the present application, the inventors examined the case wherein a plurality of bare chips
101
provided in semiconductor module substrate
102
was integrally covered with mold resin
108
, as shown in
FIG. 29
, thereby enhancement in the degree of compactness of the semiconductor device was achieved.
In the case that the plurality of bare chips
101
provided in semiconductor module substrate
102
is integrally covered, as shown in
FIG. 29
, with mold resin
108
, however, there is a problem wherein a great amount of time and effort are required for the replacement of a memory chip that has been detected as being defective according to the conventional manufacturing process of a semiconductor module. Furthermore, though there is a memory module in the form of a COB (Chip On Board) as a semiconductor module with which high density mounting can easily be carried out, there is a problem wherein a bare chip
101
that has been detected as being defective cannot be repaired after bare chips
101
have been sealed into mold resin
108
according to the conventional module in the form of a COB.
A first object of the present invention is to provide a semiconductor module wherein repair becomes possible by newly mounting a good chip even in the case that a chip defect is detected after the chips have been molded into mold resin.
A method that has been examined by the inventors in this specification, as described above, of repairing a semiconductor module in which a plurality of bare chips are mounted by using a good chip is explained in reference to
FIGS. 29
to
32
. As shown in
FIGS. 29
to
32
, a plurality of bare chips (chips in the condition of having been cut out from a wafer) is aligned so that the plurality of bare chips are integrally sealed in mold resin
108
. Then, a repair chip mounting region secured for mounting, in the case that there is a defective bare chip
101
on the front surface of semiconductor module substrate
102
, a single chip
117
, which is a good product, is formed on the rear surface of semiconductor module substrate
102
in which the plurality of bare chips
101
are molded. A single chip
117
, wherein a conventional bare chip, alone, is sealed into a mold having a lead frame, is usually mounted in the above region.
In such a case as is described above, however, the pitch between the plurality of bare chips
101
and the pitch between a plurality of single chips
117
mounted as repair chips (single molded product) differ from each other as shown in FIG.
32
. Therefore, the number of bare chips
101
that can be mounted on the front surface of semiconductor module substrate
102
and the number of single chips
117
that can be mounted on the rear surface differ from each other.
Accordingly, semiconductor module substrate
102
is considered to have a structure wherein, in the case that a plurality of bare chips
101
from among the entirety of the plurality of bare chips
101
becomes defective, there is a case wherein a plurality of single chips
117
that performs substitute functions cannot, depending on the combination of that plurality of defective bare chips
101
, be mounted. For example, a case can be considered wherein semiconductor module substrate
102
has a structure on which single chips
117
, respectively, that substitute for two bare chips
101
adjoining each other, respectively, cannot be mounted.
In addition, semiconductor module substrate
102
is, for example, considered to have a structure wherein, in the case that the entirety of the plurality of bare chips
101
mounted on semiconductor module substrate
102
becomes defective, it becomes impossible to mount all of the good chips that perform functions substituting for that entirety of bare chips
101
. More concretely, in regard to semiconductor module substrate
102
shown in
FIG. 32
, in the case that the maximum number of bare chips
101
that can be mounted is
12
, only eight single chips
117
, at a maximum, can be mounted as repair chips. Accordingly, the entirety of repair chips
103
, respectively corresponding to the entirety of bare chips
101
, cannot be mounted and, therefore, bare chips
101
remain when the single chips
117

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