Semiconductor module

Details Semiconductor module Semiconductor module

2000-02-04

2002-09-03

Talbott, David L. (Department: 2827)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S724000, C257S725000, C257S691000, C257S579000, C257S578000, C257S784000

Reexamination Certificate

active

06445068

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor module in which a plurality of semiconductor elements are interconnected in parallel to each other, and more specifically to a technology of improving the characteristic of a semiconductor module in which a plurality of MOS transistors are interconnected in parallel to each other.
2. Description of the Related Art
A semiconductor module in which a plurality of semiconductor elements are interconnected in parallel to each other is used as, for example, a switch for controlling an large electric current. In this case, each semiconductor element is, for example, a MOS transistor having the same characteristic.
FIG. 1
shows an example of an existing semiconductor module in which a plurality of semiconductor elements are interconnected in parallel to each other. Described below is each semiconductor element as a MOS transistor.
A plurality of MOS transistors
1
are arranged on the top surface of a conductor substrate
2
. The conductor substrate
2
is a drain electrode to which the drain contact of each MOS transistor
1
is connected. In addition, an input terminal (drain terminal)
3
is connected to the conductor substrate
2
. An output conductor path
4
is a source electrode to which an output terminal (source terminal)
5
is connected. Furthermore, the source contact of each MOS transistor
1
and the output conductor path
4
are interconnected through a bonding wire
6
. A drive signal conductor path
7
is a gate electrode to which a drive signal terminal (gate terminal)
8
is connected. In addition, the gate contact of each MOS transistor
1
and the drive signal conductor path
7
are interconnected through a bonding wire
9
. These bonding wires can be, for example, metal wires of aluminum, etc. Each of the output conductor path
4
and the drive signal conductor path
7
is electrically isolated from the conductor substrate
2
.
FIG. 2
shows the circuit of the semiconductor module shown in FIG.
1
. In this example, two MOS transistors M
1
and M
2
are connected in parallel as a plurality of MOS transistors
1
. A diode D is provided as parasitic to each MOS transistor. An inductor L is an inductance of the bonding wire
6
(or the bonding wire
6
and the output conductor path
4
) which is a path through which a main current flows.
When a voltage higher than a predetermined value (gate threshold voltage) is applied between the output terminal
5
and the drive signal terminal
8
, the MOS transistors M
1
and M
2
are turned on. If the voltage can be maintained, the MOS transistors M
1
and M
2
maintain the ON state, and the main current can flow from the input terminal
3
to the output terminal
5
. On the other hand, when the voltage between the output terminal
5
and the drive signal terminal
8
is lowered than the predetermined value, the MOS transistors M
1
and M
2
are turned off.
When the MOS transistors are turned on or off as described above, the main current changes. That is, the main current sharply increases when they are turned on, and sharply decreases when they are turned off. If the current through the inductor changes, then, as it is well-known, a voltage decreasing the speed of the current change is generated.
Therefore, when the MOS transistors M
1
and M
2
are turned on, a voltage allowing a current to flow in the arrow A direction is generated by the inductor L. Therefore, the increasing speed of the main current is lowered, thereby the switching speed is also lowered. When the MOS transistors M
1
and M
2
are turned off, a voltage allowing a current to flow in the arrow B direction is generated. Therefore, the decreasing speed of the main current is lowered, thereby also lowering the switching speed. Thus, when the switching speed is reduced, the change rate of the main current is lowered. Therefore, the surge voltage whose level is proportional to di/dt also becomes lower. Thus, in the semiconductor module shown in
FIG. 1
, a large surge voltage is prevented from being generated by the inductance of the bonding wire
6
.
The MOS transistors M
1
and M
2
can be used as diodes. In this case, when the voltage applied to the output terminal
5
is higher than the voltage applied to the input terminal
3
, the forward current IF flows through each diode. When the forward voltage for the diode is set to a value lower than a predetermined value, each diode is turned off. In this case, the forward current IF decreases with time, and returns to zero (0) after it becomes negative. The process of the forward current IF returning from a negative value to zero is referred to as ‘recovery’.
At the recovery of the diode D, the forward current IF increase, and the inductor L generates a voltage which delays a change of the current. Thus, although the potential of the input terminal
3
instantly rises, the MOS transistor normally has a parasitic capacity between the gate and the drain. Therefore, the potential is supplied to the gate of the MOS transistor through the parasitic capacity. As a result, the MOS transistor instantly enters ON state, and the voltage generated when the diode D recovers is absorbed by the MOS transistor.
In a semiconductor module with the above described configuration, it is difficult to make the inductances of the MOS transistors match each other. That is, since it is difficult to make the lengths of the bonding wires
6
of the MOS transistors match each other, thereby causing non-uniform inductances of main current paths for respective MOS transistors. In addition, when the paths of the main currents of respective MOS transistors, that is, the paths from the input terminal
3
to the output terminal
5
through respective MOS transistors, are compared with each other, the length of the output conductor path
4
depends on the position of each MOS transistor, thereby also causing non-uniform inductances of the MOS transistors.
When the inductances of the MOS transistors are not uniform with each other, a large surge voltage may be generated in a specific MOS transistor in a plurality of MOS transistors, or a current may be concentrated on a specific MOS transistor.
Regardless of the inductance of a MOS transistor, uneven characteristics (for example, a gate threshold voltage) of MOS transistors may also cause non-uniform operations.
SUMMARY OF THE INVENTION
The present invention aims at solving the above described problem, and leveling the operations of a plurality of semiconductor elements in a semiconductor module in which the plurality of semiconductor elements are interconnected in parallel to each other.
The semiconductor module of the present invention has a plurality of semiconductor elements interconnected in parallel to each other, and includes a first conductor, connected to each of the main current input contact areas of the plurality of semiconductor elements, for inputting the main current flowing through the plurality of semiconductor elements; a second conductor, connected to each of the main current output contact areas of the plurality of semiconductor elements, for outputting the main current; and a third conductor, connected to each of the drive signal input contact areas of the plurality of semiconductor elements. The plurality of semiconductor elements are drive-controlled based on the potential difference provided through the second and third conductors. Then, each of the main current output contact areas of the plurality of semiconductor elements is interconnected to each other through a fourth conductor.
With the above described semiconductor module, the plurality of semiconductor elements are drive-controlled based on the potential difference provided through the third conductor and the second conductor which is the path through which the main current flows. Therefore, when the semiconductor elements are switched, an induction voltage lowering the speed of changing the current is generated by the inductance of the second conductor. As a result, the switching speed can be prevented from bei

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