Semiconductor memory with connection pads disposed in the interi

Details Semiconductor memory with connection pads disposed in the interi Semiconductor memory with connection pads disposed in the interi

1990-11-26

1992-04-28

Hille, Rolf

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 68, 357 41, 365 51, H01L 2710, H01L 2348, H01L 2702

Patent

active

051092654

ABSTRACT:
A semiconductor memory includes a rectangular chip surface having corners. Four combined cell field blocks are each disposed at a respective one of the corners of the chip surface. Rectangular cell field blocks are combined in each of the combined cell field blocks, with each two of the cell field blocks having edges facing each other. Cell fields are combined into each of the cell field blocks, with the cell fields having word and bit lines. Decoder blocks face each other on the edges of the cell field blocks. The chip surface has a surface area between the decoder blocks being free of cell fields. Peripheral circuit blocks are disposed inside the surface area being free of cell fields. Connection paths are disposed inside the surface area being free of cell fields for connecting the semiconductor memory to connections of a housing.

REFERENCES:
patent: 4796224 (1989-01-01), Kawai et al.
patent: 4864381 (1989-09-01), Seefeldt et al.
IEEE Journal of Solid-State Circuits, vol. SC-19, No. 5, Oct. 1984, pp. 627-633, IEEE, N.Y., U.S.; J. Yamada et al.: "A Submicron 1 Mbit dynamic RAM with a 4-Bit-at-a-Time built-In ECC Circuit".
IEEE International Solid-State Circuits Conference 1989, pp. 352-355.

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