Semiconductor memory with built-in row buffer and method of driv

Details Semiconductor memory with built-in row buffer and method of driv Semiconductor memory with built-in row buffer and method of driv

1998-09-30

2000-11-28

Nelms, David

Static information storage and retrieval

Format or disposition of elements

36523008, E11C 800

Patent

active

061543853

ABSTRACT:
There is provided a semiconductor memory including a plurality of sub-arrays each of which includes a plurality of cells arranged in a matrix, at least one word line connected to gates of cells arranged in a first direction among the cells, at least one bit line for providing a data-writing signal to one of electrodes of cells arranged in a second direction among the cells, the second direction being perpendicular to the first direction, at least one ground line for reading data out of the other of the electrodes of cells arranged in the second direction, a plurality of sense-amplifiers associated with each of the sub-arrays for providing a sense-amplifying current to the bit line, and a plurality of row buffers connected to all of the sub-arrays for retaining data of a cell selected by the word line. In accordance with the above-mentioned semiconductor memory, a plurality of row buffers for retaining data stored in cells in a sub-array selected by a word line are connected to all of the sub-arrays. Hence, it is possible to reduce internal I/O buses, which further makes it possible to avoid that a semiconductor chip is increased in size because of an increase of internal I/O buses. In addition, since it is no longer necessary to form a three-layered aluminum structure, a fabrication cost can be suppressed from increasing. Furthermore, since data transmission can be conducted between row buffers and external circuits, a data transmission speed can be enhanced.

REFERENCES:
patent: 4649516 (1987-03-01), Chung et al.
patent: 5025421 (1991-06-01), Cho
patent: 5323350 (1994-06-01), Mclaury
patent: 5568427 (1996-10-01), Takemae

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