Semiconductor memory testing apparatus

Details Semiconductor memory testing apparatus Semiconductor memory testing apparatus

1997-12-29

1999-04-20

Nguyen, Viet Q.

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365200, 365191, G11C 2900

Patent

active

058963332

ABSTRACT:
A memory device comprising memory cells associated with word lines for storing data. A timer is connected to determine the length of time during which a selected word line(s) is activated. The word line activation time length is shorter in a testing mode than in a using mode.

REFERENCES:
patent: 5309446 (1994-05-01), Cline, et al.
patent: 5550394 (1996-08-01), Sukegana et al.
patent: 5615157 (1997-03-01), Nakashima et al.
patent: 5689465 (1997-11-01), Sukegawa et al.
patent: 5757708 (1998-05-01), Nakashima et al.

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