Semiconductor memory test equipment

Details Semiconductor memory test equipment Semiconductor memory test equipment

1985-05-15

1986-12-23

Atkinson, Charles E.

Excavating

324 73R, 365201, 371 25, G01R 3128

Patent

active

046317244

ABSTRACT:
A semiconductor tester in which an address is generated by a test pattern generator in synchronism with an operating clock from a timing generator, the address is applied to a memory under test, and a check is made to determine if the power source current to the memory under test is larger than a predetermined value. A current value deciding circuit is provided, by which the power source current value is detected, and it is decided by a comparator whether the detected current value is greater than the predetermined value or not. The decision result is output at the timing of an output timing signal from the timing generator.

REFERENCES:
patent: 3617873 (1971-11-01), Murray
patent: 4233668 (1980-11-01), Yamaguchi et al.
patent: 4293950 (1981-10-01), Shimizu et al.
patent: 4497056 (1985-01-01), Sugamori
patent: 4519076 (1985-05-01), Priel et al.

Affiliated with

Also associated with

Rating

Semiconductor memory test equipment does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory test equipment, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory test equipment will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-176475