Semiconductor memory system for monitoring a signal output, sync

Details Semiconductor memory system for monitoring a signal output, sync Semiconductor memory system for monitoring a signal output, sync

1994-03-16

1995-06-06

Popek, Joseph A.

Static information storage and retrieval

Addressing

Sync/clocking

365191, 365233, G11C 700

Patent

active

054228590

ABSTRACT:
A semiconductor memory system has a central processing unit (CPU) for supplying an address signal to any one of a plurality of memories for storing data and processing data read out from an address corresponding to the address signal. The memory outputs data addressed in response to an address signal from the central processing unit. The system further comprises a circuit for generating a STAT signal representing that the output data is valid. The STAT signal is output in synchronization with the output data, and monitored by the central processing unit, thereby controlling a cycle of operations for reading data from the plurality of memories.

REFERENCES:
patent: 4961172 (1990-10-01), Shubat
patent: 5126975 (1992-06-01), Handy
patent: 5210715 (1993-05-01), Houston

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