Semiconductor memory repairing a defective bit and...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185110, C365S200000, C365S201000

Reexamination Certificate

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07864578

ABSTRACT:
A semiconductor memory has a plurality of blocks, and each of the blocks comprises a plurality of pages, and further, each of the pages has a plurality of memory cells. A block having defective bits less than N (N is an integer number more than 0) in all pages of the block stores a first data showing a normal block. A block including at least one page having defective bits more than N and including no page having defective bits more than M (M is an integer number of M>N) stores a second data showing a psedo-pass block as a pseudo-normal block. A block including at least one page having defective bits more than M stores a third data showing a defective block.

REFERENCES:
patent: 7242615 (2007-07-01), Nagashima
patent: 2007/0245098 (2007-10-01), Takada
patent: 2008/0177956 (2008-07-01), Peddle
patent: 2002-140899 (2002-05-01), None

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