Semiconductor memory miniaturized by line groups and staggered c

Details Semiconductor memory miniaturized by line groups and staggered c Semiconductor memory miniaturized by line groups and staggered c

1982-08-19

1984-11-06

Hecker, Stuart N.

Static information storage and retrieval

Interconnection arrangements

Transistors or diodes

365230, 365 51, G11C 502, G11C 506

Patent

active

044816090

ABSTRACT:
A semiconductor memory device wherein each word-line selecting and driving circuit output is connected to a set of plural adjacent word lines and a plurality of memory cells are arranged between one of the adjacent word lines in one set and one of bit lines. By connecting a set of plural adjacent word lines to each word-line selecting and driving circuit the interval between adjacent bit lines, the interval between adjacent word lines, the size of the memory cell array, and therefore the size of the semiconductor memory device can be reduced.

REFERENCES:
patent: 3484767 (1969-12-01), Matthews

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