Static information storage and retrieval – Addressing – Multiplexing
Patent
1991-03-18
1992-12-22
Gossage, Glenn
Static information storage and retrieval
Addressing
Multiplexing
365233, 365193, G11C 800, G11C 11408
Patent
active
051738783
ABSTRACT:
A memory system includes a semiconductor memory device having random-access memory cells arranged as an integrated memory cell array, a plurality of bit lines for exchanging data with each of the memory cells, and a plurality of word lines intersecting with the bit lines. The semiconductor memory device is an address multiplexed type device in which a column address for selecting a bit line and a row address for selecting a word line are obtained from a single circuit. In this device, the input order of the column and row addresses during a read cycle differs from that during a write cycle.
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patent: 4811299 (1989-03-01), Miyazawa et al.
patent: 4951251 (1990-08-01), Yamaguchi
Masuoka Fujio
Ohuchi Kazunori
Sakui Koji
Gossage Glenn
Kabushiki Kaisha Toshiba
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