Semiconductor memory IC testing device

Details Semiconductor memory IC testing device Semiconductor memory IC testing device

1997-04-28

1998-05-12

Palys, Joseph

Excavating

371 271, G06F 1100

Patent

active

057517282

ABSTRACT:
In order to make it possible to simultaneously test 16 semiconductor memory ICs each having 16 I/O ports, a connecting part acting as an adapter is inserted between each of the semiconductor memory IC and a memory IC tester part. In testing a semiconductor memory IC, first, common write data for testing is simultaneously written to a large number of memory cells of the IC. For this purpose, write data from a write data generator in the memory IC tester port is written to the memory cells through an input and output change-over circuit, a write data branching circuit, and the I/O ports. Thereafter, data is read from the memory cells and supplied to an EX-OR circuit from the 16 I/O ports. The EX-OR output is supplied to an operational result data comparison and inspection unit of the memory IC tester part via the input and output change-over circuit. The value of the EX-OR output goes to a high level only when all of the read data from the 16 I/O ports are equal, and goes to a low level otherwise. Accordingly, the low level of the EX-OR output indicates that there exists an abnormality in either of writing or reading in the memory cells that generated these read data.

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